公开(公告)号：US06605494B1

公开(公告)日：2003-08-12

申请号：US09598649

申请日：2000-06-22

申请人： Jae-Yong Park ,  Jae-Kyun Lee ,  Jung-Hoan Kim

发明人： Jae-Yong Park ,  Jae-Kyun Lee ,  Jung-Hoan Kim

IPC分类号： H01L2100

CPC分类号： H01L29/66765 ,  H01L29/78618

摘要： In the method of fabricating a TFT in accordance with the present invention, a first semiconductor layer 37 to be used as a channel is formed on a portion of an insulating layer 35 in correspondence with an underlying gate electrode 33. A second semiconductor layer 34, ohmic contact layer 41 and metal layer 45 are then successively formed on the insulating layer 35 and first semiconductor layer 37. A photoresist pattern is next formed on a portion of the ohmic contact layer other than a portion corresponding to the gate electrode. The metal layer is patterned using the photoresist pattern to form source 43 and drain 45 electrodes, and the ohmic contact layer 41 and second semiconductor layer 39 are removed using the photoresist pattern as a mask, or using the source and drain electrodes as a mask, to expose portions of the insulating layer and first semiconductor layer. A passivation layer 47 is formed to cover the insulating layer, first semiconductor layer, and source and drain electrodes. A contact hole 49 is formed in the passivation layer, followed by formation of a pixel electrode 51 in electrical contact with the drain electrode through the contact hole.

摘要翻译： 在根据本发明的TFT的制造方法中，用作沟道的第一半导体层37形成在与下面的栅电极33对应的绝缘层35的一部分上。第二半导体层34， 然后在绝缘层35和第一半导体层37上依次形成欧姆接触层41和金属层45.接着，在欧姆接触层的与栅电极对应的部分以外的部分上形成光刻胶图形。 使用光致抗蚀剂图案对金属层进行图案化以形成源极43和漏极45电极，并且使用光致抗蚀剂图案作为掩模或者使用源极和漏极作为掩模来去除欧姆接触层41和第二半导体层39， 以暴露绝缘层和第一半导体层的部分。 形成钝化层47以覆盖绝缘层，第一半导体层以及源极和漏极。 在钝化层中形成接触孔49，随后形成通过接触孔与漏电极电接触的像素电极51。

公开(公告)号：US08643800B2

公开(公告)日：2014-02-04

申请号：US13100708

申请日：2011-05-04

申请人： Sun-Woo Kim ,  Jae-Kyun Lee ,  Jae-Young Oh ,  Dae-Jung Choi

发明人： Sun-Woo Kim ,  Jae-Kyun Lee ,  Jae-Young Oh ,  Dae-Jung Choi

IPC分类号： G02F1/136

CPC分类号： G02F1/136277 ,  H01L27/12 ,  H01L27/1214 ,  H01L27/1251 ,  H01L27/1288

摘要： A liquid crystal display device includes an array substrate including: gate and data lines crossing each other on a first substrate to define a pixel region; a common line in parallel with the gate line; first and second common line patterns extending from the common line, wherein the data line is between the first and second common line patterns; a thin film transistor connected to the gate and data lines; a pixel electrode connected to the thin film transistor and in the pixel region; and an inorganic black matrix below the gate line, the common line, and the first and second common lines, wherein the inorganic black matrix below the first and second common lines shields the data line; an opposing substrate including a common electrode on a second substrate; and a liquid crystal layer between the array substrate and the opposing substrate.

摘要翻译： 一种液晶显示装置，包括：阵列基板，包括：第一基板上彼此交叉的栅极和数据线，以限定像素区域; 与栅极线并联的公共线; 从所述公共线延伸的第一和第二公共线图案，其中所述数据线在所述第一和第二公共线图案之间; 连接到栅极和数据线的薄膜晶体管; 连接到薄膜晶体管和像素区域中的像素电极; 以及栅极线以下的无机黑色矩阵，公共线以及第一和第二公共线，其中，所述第一和第二公共线下方的无机黑色矩阵屏蔽所述数据线; 在第二基板上包括公共电极的相对基板; 以及阵列基板和相对基板之间的液晶层。

公开(公告)号：US20120008072A1

公开(公告)日：2012-01-12

申请号：US13238987

申请日：2011-09-21

申请人： Jung-Eun Lee ,  Jae-Kyun Lee ,  Moo-Hyoung Song ,  Seung-Chan Choi

发明人： Jung-Eun Lee ,  Jae-Kyun Lee ,  Moo-Hyoung Song ,  Seung-Chan Choi

IPC分类号： G02F1/1335 ,  H01L33/08 ,  G02F1/1343

CPC分类号： H01L33/0041 ,  G02F1/134363 ,  G02F1/136209

摘要： An array substrate for an in-plane switching mode liquid crystal display device includes a substrate, a gate line disposed along a first direction on the substrate, a data line disposed along a second direction and crossing the gate line to define a pixel region, a thin film transistor connected to the gate line and the data line, pixel electrodes disposed in the pixel region and connected to the thin film transistor, common electrodes disposed in the pixel region and alternating with the pixel electrodes, a semiconductor layer underlying the data line and including a portion having a width greater than a width of the data line, and a first blocking pattern comprising an opaque material and disposed under the semiconductor layer.

摘要翻译： 面内切换模式液晶显示装置的阵列基板包括基板，沿基板的第一方向设置的栅极线，沿着第二方向设置并与栅极线交叉以限定像素区域的数据线， 连接到栅极线和数据线的薄膜晶体管，设置在像素区域中并连接到薄膜晶体管的像素电极，设置在像素区域中并与像素电极交替的公共电极，位于数据线下面的半导体层，以及 包括宽度大于数据线的宽度的部分，以及包括不透明材料并设置在半导体层下方的第一阻挡图案。

公开(公告)号：US20100015775A1

公开(公告)日：2010-01-21

申请号：US12346811

申请日：2008-12-30

申请人： Hae-Jung Lee ,  Jae-Seon Yu ,  Jae-Kyun Lee ,  Sang-Rok Oh

发明人： Hae-Jung Lee ,  Jae-Seon Yu ,  Jae-Kyun Lee ,  Sang-Rok Oh

IPC分类号： H01L21/76

CPC分类号： H01L21/823437 ,  H01L29/66621

摘要： A method for fabricating a semiconductor device with a recess gate includes providing a substrate, forming an isolation layer over the substrate to define an active region, forming mask patterns with a first width opening exposing a region where recess patterns are to be formed, and a second width opening smaller than the first width and exposing the isolation layer, forming a passivation layer along a height difference of the mask patterns, etching the substrate using the passivation layer and the mask patterns as an etch barrier to form recess patterns, removing the passivation layer and the mask patterns, and forming gate patterns protruding from the substrate to fill the recess patterns.

摘要翻译： 一种用于制造具有凹槽的半导体器件的方法包括提供衬底，在衬底上形成隔离层以限定有源区，形成具有第一宽度开口的掩模图案，该第一宽度开口露出要形成凹部图案的区域，以及 第二宽度开口小于第一宽度并暴露隔离层，沿着掩模图案的高度差形成钝化层，使用钝化层蚀刻衬底，并将掩模图案作为蚀刻阻挡层以形成凹陷图案，去除钝化层 层和掩模图案，以及形成从基板突出以填充凹陷图案的栅极图案。

公开(公告)号：US07575981B2

公开(公告)日：2009-08-18

申请号：US12004240

申请日：2007-12-18

申请人： Hae-Jung Lee ,  Hyun-Sik Park ,  Jae-Kyun Lee

发明人： Hae-Jung Lee ,  Hyun-Sik Park ,  Jae-Kyun Lee

IPC分类号： H01L21/76

CPC分类号： H01L21/76232

摘要： A method for fabricating an isolation layer in a semiconductor device includes providing a substrate, forming a trench over the substrate, forming a liner nitride layer and a liner oxide layer along a surface of the trench, forming an insulation layer having an etch selectivity ratio different from that of the liner oxide layer over the liner oxide layer, forming a spin on dielectric (SOD) oxide layer to fill a portion of the trench over the insulation layer, and forming a high density plasma (HDP) oxide layer for filling the remaining a portion of the trench.

摘要翻译： 在半导体器件中制造隔离层的方法包括：提供衬底，在衬底上形成沟槽，沿着沟槽的表面形成衬里氮化物层和衬垫氧化物层，形成具有不同蚀刻选择比的绝缘层 与衬垫氧化物层上的衬垫氧化物层的衬垫氧化物层的形成自旋在电介质（SOD）氧化物层上形成，以填充绝缘层上的一部分沟槽，并形成高密度等离子体（HDP）氧化物层，用于填充剩余的 一部分沟槽。

公开(公告)号：US20080220543A1

公开(公告)日：2008-09-11

申请号：US12004179

申请日：2007-12-20

申请人： Hyun-Sik Park ,  Hae-Jung Lee ,  Jae-Kyun Lee

发明人： Hyun-Sik Park ,  Hae-Jung Lee ,  Jae-Kyun Lee

IPC分类号： H01L21/02

CPC分类号： H01L23/5258 ,  H01L2924/0002 ,  H01L2924/00

摘要： A method for fabricating a semiconductor device includes forming a fuse over a substrate, the fuse having a barrier layer, a metal layer, and an anti-reflective layer stacked, selectively removing the anti-reflective layer, forming an insulation layer over a whole surface of the resultant structure including the fuse, and performing repair-etching such that part of the insulation layer remains above the fuse.

摘要翻译： 一种用于制造半导体器件的方法，包括在衬底上形成熔丝，所述熔丝具有阻挡层，金属层和抗反射层，层叠，选择性地去除抗反射层，在整个表面上形成绝缘层 包括保险丝的所得结构，并执行修补蚀刻，使得绝缘层的一部分保留在保险丝上方。

公开(公告)号：US20050046784A1

公开(公告)日：2005-03-03

申请号：US10961081

申请日：2004-10-12

申请人： Gee-Sung Chae ,  Jae-Kyun Lee ,  Yong-Sup Hwang

发明人： Gee-Sung Chae ,  Jae-Kyun Lee ,  Yong-Sup Hwang

IPC分类号： G02F1/1333 ,  G02F1/1343 ,  G02F1/136 ,  G02F1/1362 ,  G02F1/1368 ,  H01L29/786 ,  G02F1/13

CPC分类号： G02F1/13458 ,  G02F1/1362 ,  G02F1/136213

摘要： An array substrate and a method of manufacturing thereof are disclosed for a liquid crystal display device. The array substrate includes a substrate, a gate line disposed along a first direction on the substrate, a common line parallel to the gate line and spaced apart from the gate line, wherein the common line is made of the same material as the gate line. The array substrate also includes a gate insulating layer on the gate and common lines, a semiconductor layer on the gate insulating layer and a pixel electrode of transparent conductive material including a drain electrode portion. The drain electrode portion overlaps the semiconductor layer and a source electrode of transparent conductive material is spaced apart from the drain electrode portion. A passivation layer includes a first contact hole and an open portion over the pixel and source electrodes, the first contact hole exposing the source electrode and the open portion exposing the pixel electrode, respectively. A data line is disposed along a second direction on the passivation layer, and the data line connected to the source electrode through the first contact hole and crossing the gate line. Alternatively, a method of forming a liquid crystal layer on a substrate having a seal pattern includes preparing a liquid crystal material in a projecting portion, applying a vibration and a pressure to the projecting portion so as to emit the liquid crystal material from the projecting portion, and depositing the emitted liquid crystal material on the substrate.

摘要翻译： 公开了一种用于液晶显示装置的阵列基板及其制造方法。 阵列基板包括基板，沿着基板上的第一方向设置的栅极线，与栅极线平行并与栅极线间隔开的公共线，其中公共线由与栅极线相同的材料制成。 阵列基板还包括栅极和公共线上的栅极绝缘层，栅极绝缘层上的半导体层和包括漏电极部分的透明导电材料的像素电极。 漏电极部与半导体层重叠，透明导电材料的源电极与漏电极部分隔开。 钝化层包括第一接触孔和在像素和源极上的开口部分，第一接触孔分别暴露出源电极和暴露像素电极的开放部分。 数据线沿着第二方向设置在钝化层上，数据线通过第一接触孔与源极连接并与栅极线交叉。 或者，在具有密封图案的基板上形成液晶层的方法包括在突出部分中制备液晶材料，向突出部分施加振动和压力以从突出部分发射液晶材料 并将所发射的液晶材料沉积在基板上。

公开(公告)号：US6057904A

公开(公告)日：2000-05-02

申请号：US953631

申请日：1997-10-17

申请人： Jeong-Hyun Kim ,  Jae-Kyun Lee

发明人： Jeong-Hyun Kim ,  Jae-Kyun Lee

IPC分类号： G02F1/136 ,  G02F1/1343 ,  G02F1/1362 ,  G02F1/1368 ,  H01L21/77 ,  H01L21/84 ,  H01L27/12 ,  H01L29/04

CPC分类号： G02F1/136227 ,  G02F1/1368 ,  H01L27/1214

摘要： A liquid crystal display that comprises an insulating substrate, an insulating layer covering the insulating layer, a pixel electrode formed on the insulating layer, an insulating interlayer covering the pixel electrode, the insulating interlayer having a contact hole the contact hole exposing a part of the surface on the pixel electrode, a drain electrode formed on the insulating interlayer, the drain electrode connecting to the pixel electrode through the contact hole, a thin film transistor including the drain electrode, a source electrode and an active layer on the insulating interlayer, and a data line extending to the source electrode and partially overlapping the pixel electrode.

摘要翻译： 一种液晶显示器，包括绝缘基板，覆盖绝缘层的绝缘层，形成在绝缘层上的像素电极，覆盖像素电极的绝缘夹层，绝缘中间层具有接触孔，该接触孔暴露部分 形成在绝缘中间层上的漏电极，通过接触孔连接到像素电极的漏电极，在绝缘中间层上包括漏电极，源电极和有源层的薄膜晶体管，以及 数据线延伸到源电极并且部分地与像素电极重叠。

公开(公告)号：US20110273651A1

公开(公告)日：2011-11-10

申请号：US13100708

申请日：2011-05-04

申请人： Sun-Woo Kim ,  Jae-Kyun Lee ,  Jae-Young Oh ,  Dae-Jung Choi

发明人： Sun-Woo Kim ,  Jae-Kyun Lee ,  Jae-Young Oh ,  Dae-Jung Choi

IPC分类号： G02F1/1333 ,  H01J9/00

CPC分类号： G02F1/136277 ,  H01L27/12 ,  H01L27/1214 ,  H01L27/1251 ,  H01L27/1288

摘要： A liquid crystal display device includes an array substrate including: gate and data lines crossing each other on a first substrate to define a pixel region; a common line in parallel with the gate line; first and second common line patterns extending from the common line, wherein the data line is between the first and second common line patterns; a thin film transistor connected to the gate and data lines; a pixel electrode connected to the thin film transistor and in the pixel region; and an inorganic black matrix below the gate line, the common line, and the first and second common lines, wherein the inorganic black matrix below the first and second common lines shields the data line; an opposing substrate including a common electrode on a second substrate; and a liquid crystal layer between the array substrate and the opposing substrate.

摘要翻译： 一种液晶显示装置，包括：阵列基板，包括：第一基板上彼此交叉的栅极和数据线，以限定像素区域; 与栅极线并联的公共线; 从所述公共线延伸的第一和第二公共线图案，其中所述数据线在所述第一和第二公共线图案之间; 连接到栅极和数据线的薄膜晶体管; 连接到薄膜晶体管和像素区域中的像素电极; 和栅极线下方的无机黑色矩阵，公共线以及第一和第二公共线，其中第一和第二公共线下方的无机黑色矩阵屏蔽数据线; 在第二基板上包括公共电极的相对基板; 以及阵列基板和相对基板之间的液晶层。

公开(公告)号：US20110272697A1

公开(公告)日：2011-11-10

申请号：US13100771

申请日：2011-05-04

申请人： Jae-Kyun Lee ,  Jae-Young Oh

发明人： Jae-Kyun Lee ,  Jae-Young Oh

IPC分类号： H01L33/62

CPC分类号： H01L27/1255 ,  G02F1/133553 ,  G02F1/133555 ,  H01L27/12 ,  H01L27/1248

摘要： An array substrate for a liquid crystal display device includes a substrate, a gate line and a data line on the substrate and crossing each other to define a pixel region, a thin film transistor connected to the gate line and the data line, a first passivation layer on the thin film transistor and having a first unevenness structure at its top surface, an auxiliary unevenness layer on the first passivation layer and having a first roughness structure at its top surface, and a reflector on the auxiliary unevenness layer, the reflector having a second unevenness structure due to the first unevenness structure of the first passivation layer and a second roughness structure due to the first roughness structure of the auxiliary unevenness layer, the second roughness structure having smaller patterns than the second unevenness structure.

摘要翻译： 用于液晶显示装置的阵列基板包括基板，栅极线和数据线，并且彼此交叉以形成像素区域，连接到栅极线和数据线的薄膜晶体管，第一钝化层 并且在其顶表面具有第一不均匀结构，在第一钝化层上具有辅助凹凸层，并且在其顶表面具有第一粗糙结构，在辅助凹凸层上具有反射器，反射器具有 由于第一钝化层的第一不均匀结构引起的第二不均匀结构和由于辅助凹凸层的第一粗糙结构引起的第二粗糙结构，所述第二粗糙结构具有比第二凹凸结构更小的图案。