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公开(公告)号:US08334582B2
公开(公告)日:2012-12-18
申请号:US12347026
申请日:2008-12-31
申请人: Shin-Puu Jeng , Hsien-Wei Chen , Shang-Yun Hou , Hao-Yi Tsai , Anbiarshy N. F. Wu , Yu-Wen Liu
发明人: Shin-Puu Jeng , Hsien-Wei Chen , Shang-Yun Hou , Hao-Yi Tsai , Anbiarshy N. F. Wu , Yu-Wen Liu
IPC分类号: H01L23/544
CPC分类号: H01L21/78 , H01L23/562 , H01L23/564 , H01L23/585 , H01L2924/0002 , H01L2924/00
摘要: A semiconductor chip includes a semiconductor substrate; a plurality of low-k dielectric layers over the semiconductor substrate; a first passivation layer over the plurality of low-k dielectric layers; and a second passivation layer over the first passivation layer. A first seal ring is adjacent to an edge of the semiconductor chip, wherein the first seal ring has an upper surface substantially level to a bottom surface of the first passivation layer. A second seal ring is adjacent to the first seal ring and on an inner side of the semiconductor chip than the first seal ring. The second seal ring includes a pad ring in the first passivation layer and the second passivation layer. A trench ring includes at least a portion directly over the first seal ring. The trench ring extends from a top surface of the second passivation layer down to at least an interface between the first passivation layer and the second passivation layer.
摘要翻译: 半导体芯片包括半导体衬底; 半导体衬底上的多个低k电介质层; 在所述多个低k电介质层上的第一钝化层; 以及在所述第一钝化层上的第二钝化层。 第一密封环邻近半导体芯片的边缘,其中第一密封环具有基本上平坦于第一钝化层的底表面的上表面。 第二密封环与第一密封环相邻,并且在半导体芯片的内侧与第一密封环相邻。 第二密封环包括在第一钝化层和第二钝化层中的焊盘环。 沟槽环包括直接在第一密封环上的至少一部分。 沟槽环从第二钝化层的顶表面延伸到至少第一钝化层和第二钝化层之间的界面。
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公开(公告)号:US20080191205A1
公开(公告)日:2008-08-14
申请号:US11706940
申请日:2007-02-13
申请人: Hao-Yi Tsai , Shih-Hsun Hsu , Shih-Cheng Chang , Shang-Yun Hou , Hsien-Wei Chen , Chia-Lun Tsai , Benson Liu , Shin-Puu Jeng , Anbiarshy Wu
发明人: Hao-Yi Tsai , Shih-Hsun Hsu , Shih-Cheng Chang , Shang-Yun Hou , Hsien-Wei Chen , Chia-Lun Tsai , Benson Liu , Shin-Puu Jeng , Anbiarshy Wu
IPC分类号: H01L23/58
CPC分类号: H01L23/585 , H01L22/34 , H01L24/11 , H01L2224/0554 , H01L2224/05548 , H01L2224/05573 , H01L2224/05624 , H01L2224/05639 , H01L2224/05647 , H01L2224/05684 , H01L2224/45147 , H01L2224/48091 , H01L2924/00014 , H01L2924/14 , H01L2924/00 , H01L2224/05599 , H01L2224/0555 , H01L2224/0556
摘要: A semiconductor structure includes a daisy chain adjacent to an edge of a semiconductor chip. The daisy chain includes a plurality of horizontal metal lines distributed in a plurality of metallization layers, wherein the horizontal metal lines are serially connected; a plurality of connecting pads in a same layer and electrically connecting the horizontal metal lines, wherein the connecting pads are physically separated from each other; and a plurality of vertical metal lines, each connecting one of the connecting pads to one of the horizontal metal lines, wherein one of the plurality of connecting pads is connected to one of the plurality of horizontal metal lines by only one of the plurality of vertical metal lines; and a seal ring adjacent and electrically disconnected from the daisy chain.
摘要翻译: 半导体结构包括与半导体芯片的边缘相邻的菊花链。 菊花链包括分布在多个金属化层中的多个水平金属线,其中水平金属线串联连接; 在相同层中的多个连接焊盘并且电连接水平金属线,其中连接焊盘在物理上彼此分离; 以及多个垂直金属线,每个将所述连接焊盘中的一个连接到所述水平金属线之一,其中所述多个连接焊盘中的一个连接焊盘中的一个连接焊盘仅通过所述多个垂直金属线中的一个垂直连接 金属线 以及与菊花链相邻且电气断开的密封环。
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公开(公告)号:US09601443B2
公开(公告)日:2017-03-21
申请号:US11706940
申请日:2007-02-13
申请人: Hao-Yi Tsai , Shih-Hsun Hsu , Shih-Cheng Chang , Shang-Yun Hou , Hsien-Wei Chen , Chia-Lun Tsai , Benson Liu , Shin-Puu Jeng , Anbiarshy Wu
发明人: Hao-Yi Tsai , Shih-Hsun Hsu , Shih-Cheng Chang , Shang-Yun Hou , Hsien-Wei Chen , Chia-Lun Tsai , Benson Liu , Shin-Puu Jeng , Anbiarshy Wu
CPC分类号: H01L23/585 , H01L22/34 , H01L24/11 , H01L2224/0554 , H01L2224/05548 , H01L2224/05573 , H01L2224/05624 , H01L2224/05639 , H01L2224/05647 , H01L2224/05684 , H01L2224/45147 , H01L2224/48091 , H01L2924/00014 , H01L2924/14 , H01L2924/00 , H01L2224/05599 , H01L2224/0555 , H01L2224/0556
摘要: A semiconductor structure includes a daisy chain adjacent to an edge of a semiconductor chip. The daisy chain includes a plurality of horizontal metal lines distributed in a plurality of metallization layers, wherein the horizontal metal lines are serially connected; a plurality of connecting pads in a same layer and electrically connecting the horizontal metal lines, wherein the connecting pads are physically separated from each other; and a plurality of vertical metal lines, each connecting one of the connecting pads to one of the horizontal metal lines, wherein one of the plurality of connecting pads is connected to one of the plurality of horizontal metal lines by only one of the plurality of vertical metal lines; and a seal ring adjacent and electrically disconnected from the daisy chain.
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公开(公告)号:US07651893B2
公开(公告)日:2010-01-26
申请号:US11320233
申请日:2005-12-27
申请人: Hsueh-Chung Chen , Hao-Yi Tsai , Hsien-Wei Chen , Shin-Puu Jeng , Shang-Yun Hou
发明人: Hsueh-Chung Chen , Hao-Yi Tsai , Hsien-Wei Chen , Shin-Puu Jeng , Shang-Yun Hou
IPC分类号: H01L21/82
CPC分类号: H01L23/5256 , H01L2924/0002 , H01L2924/3011 , H01L2924/00
摘要: An electrical fuse and a method for forming the same are provided. The electrical fuse includes a dielectric layer over a shallow trench isolation region and a contact plug extending from a top surface of the dielectric layer to the shallow trench isolation region, wherein the contact plug comprises a middle portion substantially narrower than the two end portions. The contact plug forms a fuse element. The electrical fuse further includes two metal lines in a metallization layer on the dielectric layer, wherein each of the two metal lines is connected to different ones of the end portions of the contact plug.
摘要翻译: 提供电熔丝及其形成方法。 电熔丝包括在浅沟槽隔离区域上的电介质层和从电介质层的顶表面延伸到浅沟槽隔离区域的接触插塞,其中接触插塞包括基本上比两个端部部分窄的中间部分。 接触插头形成熔丝元件。 电熔丝还包括在电介质层上的金属化层中的两条金属线,其中两条金属线中的每一条连接到接触插塞的不同端部。
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公开(公告)号:US20090091032A1
公开(公告)日:2009-04-09
申请号:US11868850
申请日:2007-10-08
申请人: Shih-Hsun Hsu , Hao-Yi Tsai , Benson Liu , Chia-Lun Tsai , Hsien-Wei Chen , Anbiarshy N.F. Wu , Shang-Yun Hou , Shin-Puu Jeng
发明人: Shih-Hsun Hsu , Hao-Yi Tsai , Benson Liu , Chia-Lun Tsai , Hsien-Wei Chen , Anbiarshy N.F. Wu , Shang-Yun Hou , Shin-Puu Jeng
IPC分类号: H01L23/48
CPC分类号: H01L24/06 , H01L22/32 , H01L24/05 , H01L2224/05552 , H01L2224/05599 , H01L2224/0603 , H01L2924/00014 , H01L2924/01005 , H01L2924/01006 , H01L2924/01015 , H01L2924/01033 , H01L2924/01076 , H01L2924/01082
摘要: A bonding pad design is disclosed that includes one or more pad groups on a semiconductor device. Each pad group is made up of two or more bonding pads that have an alternating orientation, such that adjacent bonding pads have their bond ball on opposite sides in relation to the adjacent bonding pad.
摘要翻译: 公开了一种焊盘设计,其包括半导体器件上的一个或多个焊盘组。 每个焊盘组由具有交替取向的两个或更多个焊盘组成,使得相邻的焊盘相对于相邻的焊盘在相对的两侧具有焊接球。
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公开(公告)号:US20070145515A1
公开(公告)日:2007-06-28
申请号:US11320233
申请日:2005-12-27
申请人: Hsueh-Chung Chen , Hao-Yi Tsai , Hsien-Wei Chen , Shin-Puu Jeng , Shang-Yun Hou
发明人: Hsueh-Chung Chen , Hao-Yi Tsai , Hsien-Wei Chen , Shin-Puu Jeng , Shang-Yun Hou
IPC分类号: H01L29/00
CPC分类号: H01L23/5256 , H01L2924/0002 , H01L2924/3011 , H01L2924/00
摘要: An electrical fuse and a method for forming the same are provided. The electrical fuse includes a dielectric layer over a shallow trench isolation region and a contact plug extending from a top surface of the dielectric layer to the shallow trench isolation region, wherein the contact plug comprises a middle portion substantially narrower than the two end portions. The contact plug forms a fuse element. The electrical fuse further includes two metal lines in a metallization layer on the dielectric layer, wherein each of the two metal lines is connected to different ones of the end portions of the contact plug.
摘要翻译: 提供电熔丝及其形成方法。 电熔丝包括在浅沟槽隔离区域上的电介质层和从电介质层的顶表面延伸到浅沟槽隔离区域的接触插塞,其中接触插塞包括基本上比两个端部部分窄的中间部分。 接触插头形成熔丝元件。 电熔丝还包括在电介质层上的金属化层中的两条金属线,其中两条金属线中的每一条连接到接触插塞的不同端部。
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公开(公告)号:US07449785B2
公开(公告)日:2008-11-11
申请号:US11347378
申请日:2006-02-06
申请人: Shin-Puu Jeng , Hao-Yi Tsai , Shang-Yun Hou , Hsien-Wei Chen , Chia-Lun Tsai
发明人: Shin-Puu Jeng , Hao-Yi Tsai , Shang-Yun Hou , Hsien-Wei Chen , Chia-Lun Tsai
CPC分类号: H01L24/12 , H01L23/3192 , H01L24/03 , H01L24/05 , H01L24/11 , H01L2224/0401 , H01L2224/05082 , H01L2224/05558 , H01L2224/05572 , H01L2224/05624 , H01L2224/05647 , H01L2224/13022 , H01L2224/13099 , H01L2224/131 , H01L2924/0002 , H01L2924/01006 , H01L2924/01013 , H01L2924/01014 , H01L2924/01015 , H01L2924/01019 , H01L2924/01022 , H01L2924/01027 , H01L2924/01028 , H01L2924/01029 , H01L2924/01033 , H01L2924/01047 , H01L2924/0105 , H01L2924/014 , H01L2924/05042 , H01L2924/14 , H01L2924/00014 , H01L2224/05552
摘要: A solder bump on a semiconductor substrate is provided. The solder bump comprises a semiconductor substrate having a top copper pad thereon, a protective layer on the semiconductor substrate and at least one inorganic passivation layer overlying the protective layer with a first opening exposing the top copper pad, wherein the inorganic passivation layer has a thinner portion adjacent a top portion of the first opening. The solder bump further comprises a soft passivation layer on the inorganic passivation layer with a second opening larger than the first opening, an under bump metal layer conformally formed along the first opening and the second opening and a solder bump formed on the under bump metal layer.
摘要翻译: 提供半导体衬底上的焊料凸块。 焊料凸块包括其上具有顶部铜焊盘的半导体衬底,半导体衬底上的保护层和覆盖保护层的至少一个无机钝化层,第一开口露出顶部铜焊盘,其中无机钝化层具有较薄的 邻近第一开口的顶部的部分。 所述焊料凸块还包括在所述无机钝化层上的软钝化层,其具有大于所述第一开口的第二开口,沿所述第一开口和所述第二开口共形形成的凸块下金属层和形成在所述下凸块金属层上的焊料凸块 。
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公开(公告)号:US20070182007A1
公开(公告)日:2007-08-09
申请号:US11347378
申请日:2006-02-06
申请人: Shin-Puu Jeng , Hao-Yi Tsai , Shang-Yun Hou , Hsien-Wei Chen , Chia-Lun Tsai
发明人: Shin-Puu Jeng , Hao-Yi Tsai , Shang-Yun Hou , Hsien-Wei Chen , Chia-Lun Tsai
CPC分类号: H01L24/12 , H01L23/3192 , H01L24/03 , H01L24/05 , H01L24/11 , H01L2224/0401 , H01L2224/05082 , H01L2224/05558 , H01L2224/05572 , H01L2224/05624 , H01L2224/05647 , H01L2224/13022 , H01L2224/13099 , H01L2224/131 , H01L2924/0002 , H01L2924/01006 , H01L2924/01013 , H01L2924/01014 , H01L2924/01015 , H01L2924/01019 , H01L2924/01022 , H01L2924/01027 , H01L2924/01028 , H01L2924/01029 , H01L2924/01033 , H01L2924/01047 , H01L2924/0105 , H01L2924/014 , H01L2924/05042 , H01L2924/14 , H01L2924/00014 , H01L2224/05552
摘要: A solder bump on a semiconductor substrate is provided. The solder bump comprises a semiconductor substrate having a top copper pad thereon, a protective layer on the semiconductor substrate and at least one inorganic passivation layer overlying the protective layer with a first opening exposing the top copper pad, wherein the inorganic passivation layer has a thinner portion adjacent a top portion of the first opening. The solder bump further comprises a soft passivation layer on the inorganic passivation layer with a second opening larger than the first opening, an under bump metal layer conformally formed along the first opening and the second opening and a solder bump formed on the under bump metal layer.
摘要翻译: 提供半导体衬底上的焊料凸块。 焊料凸块包括其上具有顶部铜焊盘的半导体衬底,半导体衬底上的保护层和覆盖保护层的至少一个无机钝化层,第一开口露出顶部铜焊盘,其中无机钝化层具有较薄的 邻近第一开口的顶部的部分。 所述焊料凸块还包括在所述无机钝化层上的软钝化层,其具有大于所述第一开口的第二开口,沿所述第一开口和所述第二开口共形形成的凸块下金属层和形成在所述下凸块金属层上的焊料凸块 。
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公开(公告)号:US08227917B2
公开(公告)日:2012-07-24
申请号:US11868850
申请日:2007-10-08
申请人: Shih-Hsun Hsu , Hao-Yi Tsai , Benson Liu , Chia-Lun Tsai , Hsien-Wei Chen , Anbiarshy N. F. Wu , Shang-Yun Hou , Shin-Puu Jeng
发明人: Shih-Hsun Hsu , Hao-Yi Tsai , Benson Liu , Chia-Lun Tsai , Hsien-Wei Chen , Anbiarshy N. F. Wu , Shang-Yun Hou , Shin-Puu Jeng
IPC分类号: H01L23/48
CPC分类号: H01L24/06 , H01L22/32 , H01L24/05 , H01L2224/05552 , H01L2224/05599 , H01L2224/0603 , H01L2924/00014 , H01L2924/01005 , H01L2924/01006 , H01L2924/01015 , H01L2924/01033 , H01L2924/01076 , H01L2924/01082
摘要: A bonding pad design is disclosed that includes one or more pad groups on a semiconductor device. Each pad group is made up of two or more bonding pads that have an alternating orientation, such that adjacent bonding pads have their bond ball on opposite sides in relation to the adjacent bonding pad.
摘要翻译: 公开了一种焊盘设计,其包括半导体器件上的一个或多个焊盘组。 每个焊盘组由具有交替取向的两个或更多个焊盘组成,使得相邻的焊盘相对于相邻的焊盘在相对的两侧具有焊接球。
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公开(公告)号:US20090321890A1
公开(公告)日:2009-12-31
申请号:US12347026
申请日:2008-12-31
申请人: Shin-Puu Jeng , Hsien-Wei Chen , Shang-Yun Hou , Hao-Yi Tsai , Anbiarshy N.F. Wu , Yu-Wen Liu
发明人: Shin-Puu Jeng , Hsien-Wei Chen , Shang-Yun Hou , Hao-Yi Tsai , Anbiarshy N.F. Wu , Yu-Wen Liu
IPC分类号: H01L23/10
CPC分类号: H01L21/78 , H01L23/562 , H01L23/564 , H01L23/585 , H01L2924/0002 , H01L2924/00
摘要: A semiconductor chip includes a semiconductor substrate; a plurality of low-k dielectric layers over the semiconductor substrate; a first passivation layer over the plurality of low-k dielectric layers; and a second passivation layer over the first passivation layer. A first seal ring is adjacent to an edge of the semiconductor chip, wherein the first seal ring has an upper surface substantially level to a bottom surface of the first passivation layer. A second seal ring is adjacent to the first seal ring and on an inner side of the semiconductor chip than the first seal ring. The second seal ring includes a pad ring in the first passivation layer and the second passivation layer. A trench ring includes at least a portion directly over the first seal ring. The trench ring extends from a top surface of the second passivation layer down to at least an interface between the first passivation layer and the second passivation layer.
摘要翻译: 半导体芯片包括半导体衬底; 半导体衬底上的多个低k电介质层; 在所述多个低k电介质层上的第一钝化层; 以及在所述第一钝化层上的第二钝化层。 第一密封环邻近半导体芯片的边缘,其中第一密封环具有基本上平坦于第一钝化层的底表面的上表面。 第二密封环与第一密封环相邻,并且在半导体芯片的内侧与第一密封环相邻。 第二密封环包括在第一钝化层和第二钝化层中的焊盘环。 沟槽环包括直接在第一密封环上的至少一部分。 沟槽环从第二钝化层的顶表面延伸到至少第一钝化层和第二钝化层之间的界面。
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