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公开(公告)号:US20080246031A1
公开(公告)日:2008-10-09
申请号:US11784632
申请日:2007-04-09
申请人: Hao-Yi Tsai , Shih-Hsun Hsu , Hsien-Wei Chen , Benson Liu , Chia-Lun Tsai , Anbiarshy N.F. Wu
发明人: Hao-Yi Tsai , Shih-Hsun Hsu , Hsien-Wei Chen , Benson Liu , Chia-Lun Tsai , Anbiarshy N.F. Wu
IPC分类号: H01L23/544 , H01L21/66
CPC分类号: H01L22/34 , H01L2924/0002 , H01L2924/00
摘要: A semiconductor structure is provided. The semiconductor structure includes a semiconductor chip and a scribe line adjoining the semiconductor chip. A conductive feature is formed in the scribe line and exposed on the surface of the scribe lines, wherein the conductive feature has an edge facing the semiconductor chip. A kerf path is in the scribe line. A first cut is formed in the conductive feature, wherein the first cut extends from the first edge to the kerf path.
摘要翻译: 提供半导体结构。 半导体结构包括半导体芯片和与半导体芯片相邻的划线。 导电特征形成在划线中并暴露在划线的表面上,其中导电特征具有面向半导体芯片的边缘。 切割路径在划线中。 在导电特征中形成第一切口,其中第一切口从第一边缘延伸到切口路径。
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公开(公告)号:US20080191205A1
公开(公告)日:2008-08-14
申请号:US11706940
申请日:2007-02-13
申请人: Hao-Yi Tsai , Shih-Hsun Hsu , Shih-Cheng Chang , Shang-Yun Hou , Hsien-Wei Chen , Chia-Lun Tsai , Benson Liu , Shin-Puu Jeng , Anbiarshy Wu
发明人: Hao-Yi Tsai , Shih-Hsun Hsu , Shih-Cheng Chang , Shang-Yun Hou , Hsien-Wei Chen , Chia-Lun Tsai , Benson Liu , Shin-Puu Jeng , Anbiarshy Wu
IPC分类号: H01L23/58
CPC分类号: H01L23/585 , H01L22/34 , H01L24/11 , H01L2224/0554 , H01L2224/05548 , H01L2224/05573 , H01L2224/05624 , H01L2224/05639 , H01L2224/05647 , H01L2224/05684 , H01L2224/45147 , H01L2224/48091 , H01L2924/00014 , H01L2924/14 , H01L2924/00 , H01L2224/05599 , H01L2224/0555 , H01L2224/0556
摘要: A semiconductor structure includes a daisy chain adjacent to an edge of a semiconductor chip. The daisy chain includes a plurality of horizontal metal lines distributed in a plurality of metallization layers, wherein the horizontal metal lines are serially connected; a plurality of connecting pads in a same layer and electrically connecting the horizontal metal lines, wherein the connecting pads are physically separated from each other; and a plurality of vertical metal lines, each connecting one of the connecting pads to one of the horizontal metal lines, wherein one of the plurality of connecting pads is connected to one of the plurality of horizontal metal lines by only one of the plurality of vertical metal lines; and a seal ring adjacent and electrically disconnected from the daisy chain.
摘要翻译: 半导体结构包括与半导体芯片的边缘相邻的菊花链。 菊花链包括分布在多个金属化层中的多个水平金属线,其中水平金属线串联连接; 在相同层中的多个连接焊盘并且电连接水平金属线,其中连接焊盘在物理上彼此分离; 以及多个垂直金属线,每个将所述连接焊盘中的一个连接到所述水平金属线之一,其中所述多个连接焊盘中的一个连接焊盘中的一个连接焊盘仅通过所述多个垂直金属线中的一个垂直连接 金属线 以及与菊花链相邻且电气断开的密封环。
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公开(公告)号:US08618673B2
公开(公告)日:2013-12-31
申请号:US13539775
申请日:2012-07-02
申请人: Benson Liu , Hsien-Wei Chen , Shin-Puu Jeng , Hao-Yi Tsai
发明人: Benson Liu , Hsien-Wei Chen , Shin-Puu Jeng , Hao-Yi Tsai
CPC分类号: H01L25/0657 , H01L2224/16225 , H01L2224/48227 , H01L2225/06555 , H01L2225/06589 , H01L2924/00011 , H01L2924/00014 , H01L2224/0401
摘要: A package structure includes a substrate, a first die and at least one second die. The substrate includes a first pair of parallel edges and a second pair of parallel edges. The first die is mounted over the substrate. The first die includes a third pair of parallel edges and a fourth pair of parallel edges, wherein the third pair of parallel edges and the fourth pair of parallel edges are not parallel to the first pair of parallel edges and the second pair of parallel edges, respectively. The at least one second die is mounted over the first die.
摘要翻译: 封装结构包括衬底,第一管芯和至少一个第二管芯。 衬底包括第一对平行边缘和第二对平行边缘。 第一个模具安装在基板上。 第一管芯包括第三对平行边缘和第四对平行边缘,其中第三对平行边缘和第四对平行边缘不平行于第一对平行边缘和第二对平行边缘, 分别。 至少一个第二管芯安装在第一管芯上。
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公开(公告)号:US20080157315A1
公开(公告)日:2008-07-03
申请号:US11619095
申请日:2007-01-02
申请人: Benson Liu , Hsien-Wei Chen , Shin-Puu Jeng , Hao-Yi Tsai
发明人: Benson Liu , Hsien-Wei Chen , Shin-Puu Jeng , Hao-Yi Tsai
IPC分类号: H01L23/02
CPC分类号: H01L25/0657 , H01L2224/16225 , H01L2224/48227 , H01L2225/06555 , H01L2225/06589 , H01L2924/00011 , H01L2924/00014 , H01L2224/0401
摘要: A package structure includes a substrate, a first die and at least one second die. The substrate includes a first pair of parallel edges and a second pair of parallel edges. The first die is mounted over the substrate. The first die includes a third pair of parallel edges and a fourth pair of parallel edges, wherein the third pair of parallel edges and the fourth pair of parallel edges are not parallel to the first pair of parallel edges and the second pair of parallel edges, respectively. The at least one second die is mounted over the first die.
摘要翻译: 封装结构包括衬底,第一管芯和至少一个第二管芯。 衬底包括第一对平行边缘和第二对平行边缘。 第一个模具安装在基板上。 第一管芯包括第三对平行边缘和第四对平行边缘,其中第三对平行边缘和第四对平行边缘不平行于第一对平行边缘和第二对平行边缘, 分别。 至少一个第二管芯安装在第一管芯上。
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公开(公告)号:US09601443B2
公开(公告)日:2017-03-21
申请号:US11706940
申请日:2007-02-13
申请人: Hao-Yi Tsai , Shih-Hsun Hsu , Shih-Cheng Chang , Shang-Yun Hou , Hsien-Wei Chen , Chia-Lun Tsai , Benson Liu , Shin-Puu Jeng , Anbiarshy Wu
发明人: Hao-Yi Tsai , Shih-Hsun Hsu , Shih-Cheng Chang , Shang-Yun Hou , Hsien-Wei Chen , Chia-Lun Tsai , Benson Liu , Shin-Puu Jeng , Anbiarshy Wu
CPC分类号: H01L23/585 , H01L22/34 , H01L24/11 , H01L2224/0554 , H01L2224/05548 , H01L2224/05573 , H01L2224/05624 , H01L2224/05639 , H01L2224/05647 , H01L2224/05684 , H01L2224/45147 , H01L2224/48091 , H01L2924/00014 , H01L2924/14 , H01L2924/00 , H01L2224/05599 , H01L2224/0555 , H01L2224/0556
摘要: A semiconductor structure includes a daisy chain adjacent to an edge of a semiconductor chip. The daisy chain includes a plurality of horizontal metal lines distributed in a plurality of metallization layers, wherein the horizontal metal lines are serially connected; a plurality of connecting pads in a same layer and electrically connecting the horizontal metal lines, wherein the connecting pads are physically separated from each other; and a plurality of vertical metal lines, each connecting one of the connecting pads to one of the horizontal metal lines, wherein one of the plurality of connecting pads is connected to one of the plurality of horizontal metal lines by only one of the plurality of vertical metal lines; and a seal ring adjacent and electrically disconnected from the daisy chain.
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公开(公告)号:US08237253B2
公开(公告)日:2012-08-07
申请号:US12946930
申请日:2010-11-16
申请人: Benson Liu , Hsien-Wei Chen , Shin-Puu Jeng , Hao-Yi Tsai
发明人: Benson Liu , Hsien-Wei Chen , Shin-Puu Jeng , Hao-Yi Tsai
IPC分类号: H01L25/07
CPC分类号: H01L25/0657 , H01L2224/16225 , H01L2224/48227 , H01L2225/06555 , H01L2225/06589 , H01L2924/00011 , H01L2924/00014 , H01L2224/0401
摘要: A package structure includes a substrate, a first die and at least one second die. The substrate includes a first pair of parallel edges and a second pair of parallel edges. The first die is mounted over the substrate. The first die includes a third pair of parallel edges and a fourth pair of parallel edges, wherein the third pair of parallel edges and the fourth pair of parallel edges are not parallel to the first pair of parallel edges and the second pair of parallel edges, respectively. The at least one second die is mounted over the first die.
摘要翻译: 封装结构包括衬底,第一管芯和至少一个第二管芯。 衬底包括第一对平行边缘和第二对平行边缘。 第一个模具安装在基板上。 第一管芯包括第三对平行边缘和第四对平行边缘,其中第三对平行边缘和第四对平行边缘不平行于第一对平行边缘和第二对平行边缘, 分别。 至少一个第二管芯安装在第一管芯上。
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公开(公告)号:US07859092B2
公开(公告)日:2010-12-28
申请号:US11619095
申请日:2007-01-02
申请人: Benson Liu , Hsien-Wei Chen , Shin-Puu Jeng , Hao-Yi Tsai
发明人: Benson Liu , Hsien-Wei Chen , Shin-Puu Jeng , Hao-Yi Tsai
IPC分类号: H01L23/02
CPC分类号: H01L25/0657 , H01L2224/16225 , H01L2224/48227 , H01L2225/06555 , H01L2225/06589 , H01L2924/00011 , H01L2924/00014 , H01L2224/0401
摘要: A package structure includes a substrate, a first die and at least one second die. The substrate includes a first pair of parallel edges and a second pair of parallel edges. The first die is mounted over the substrate. The first die includes a third pair of parallel edges and a fourth pair of parallel edges, wherein the third pair of parallel edges and the fourth pair of parallel edges are not parallel to the first pair of parallel edges and the second pair of parallel edges, respectively. The at least one second die is mounted over the first die.
摘要翻译: 封装结构包括衬底,第一管芯和至少一个第二管芯。 衬底包括第一对平行边缘和第二对平行边缘。 第一个模具安装在基板上。 第一管芯包括第三对平行边缘和第四对平行边缘,其中第三对平行边缘和第四对平行边缘不平行于第一对平行边缘和第二对平行边缘, 分别。 至少一个第二管芯安装在第一管芯上。
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公开(公告)号:US20090091032A1
公开(公告)日:2009-04-09
申请号:US11868850
申请日:2007-10-08
申请人: Shih-Hsun Hsu , Hao-Yi Tsai , Benson Liu , Chia-Lun Tsai , Hsien-Wei Chen , Anbiarshy N.F. Wu , Shang-Yun Hou , Shin-Puu Jeng
发明人: Shih-Hsun Hsu , Hao-Yi Tsai , Benson Liu , Chia-Lun Tsai , Hsien-Wei Chen , Anbiarshy N.F. Wu , Shang-Yun Hou , Shin-Puu Jeng
IPC分类号: H01L23/48
CPC分类号: H01L24/06 , H01L22/32 , H01L24/05 , H01L2224/05552 , H01L2224/05599 , H01L2224/0603 , H01L2924/00014 , H01L2924/01005 , H01L2924/01006 , H01L2924/01015 , H01L2924/01033 , H01L2924/01076 , H01L2924/01082
摘要: A bonding pad design is disclosed that includes one or more pad groups on a semiconductor device. Each pad group is made up of two or more bonding pads that have an alternating orientation, such that adjacent bonding pads have their bond ball on opposite sides in relation to the adjacent bonding pad.
摘要翻译: 公开了一种焊盘设计,其包括半导体器件上的一个或多个焊盘组。 每个焊盘组由具有交替取向的两个或更多个焊盘组成,使得相邻的焊盘相对于相邻的焊盘在相对的两侧具有焊接球。
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公开(公告)号:US20090081862A1
公开(公告)日:2009-03-26
申请号:US11860122
申请日:2007-09-24
申请人: Hsien-Wei Chen , Hao-Yi Tsai , Shin-Puu Jeng , Benson Liu
发明人: Hsien-Wei Chen , Hao-Yi Tsai , Shin-Puu Jeng , Benson Liu
IPC分类号: H01L21/4763
CPC分类号: H01L21/7682 , H01L21/76831
摘要: A method for forming air gaps between interconnect structures in semiconductor devices provides a sacrificial layer formed over a dielectric and within openings formed therein. The sacrificial layer is a blanket layer that is converted to a material that is consumable in an etchant composition that the dielectric material and a subsequently formed interconnect material are resistant to. After the interconnect material is deposited a planarized surface including portions of the dielectric material, vertical sections of the converted material and portions of the interconnect material is produced. The etchant composition then removes the converted material thereby forming voids. A capping layer is formed over the structure resulting in air gaps. A sidewall protection layer may be optionally formed between the interconnect structure and the sacrificial material. In some embodiments an ARC layer may be formed over the dielectric and form part of the planar surface.
摘要翻译: 用于在半导体器件中的互连结构之间形成气隙的方法提供了形成在电介质上并在其内形成的开口内的牺牲层。 牺牲层是覆盖层,其被转化为在蚀刻剂组合物中消耗的材料,电介质材料和随后形成的互连材料是耐受的。 在互连材料沉积之后,包括介电材料的部分的平坦化表面,产生转换材料的垂直部分和互连材料的部分。 然后蚀刻剂组合物去除转化的材料,从而形成空隙。 在结构上形成覆盖层,导致气隙。 侧壁保护层可以可选地形成在互连结构和牺牲材料之间。 在一些实施例中,可以在电介质上形成ARC层并形成平面表面的一部分。
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公开(公告)号:US20120267799A1
公开(公告)日:2012-10-25
申请号:US13539775
申请日:2012-07-02
申请人: Benson LIU , Hsien-Wei CHEN , Shin-Puu JENG , Hao-Yi TSAI
发明人: Benson LIU , Hsien-Wei CHEN , Shin-Puu JENG , Hao-Yi TSAI
CPC分类号: H01L25/0657 , H01L2224/16225 , H01L2224/48227 , H01L2225/06555 , H01L2225/06589 , H01L2924/00011 , H01L2924/00014 , H01L2224/0401
摘要: A package structure includes a substrate, a first die and at least one second die. The substrate includes a first pair of parallel edges and a second pair of parallel edges. The first die is mounted over the substrate. The first die includes a third pair of parallel edges and a fourth pair of parallel edges, wherein the third pair of parallel edges and the fourth pair of parallel edges are not parallel to the first pair of parallel edges and the second pair of parallel edges, respectively. The at least one second die is mounted over the first die.
摘要翻译: 封装结构包括衬底,第一管芯和至少一个第二管芯。 衬底包括第一对平行边缘和第二对平行边缘。 第一个模具安装在基板上。 第一管芯包括第三对平行边缘和第四对平行边缘,其中第三对平行边缘和第四对平行边缘不平行于第一对平行边缘和第二对平行边缘, 分别。 至少一个第二管芯安装在第一管芯上。
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