公开(公告)号：US08232743B2

公开(公告)日：2012-07-31

申请号：US12831231

申请日：2010-07-06

Applicant: Ke-Horng Chen ,  Chi-Lin Chen ,  Yao-Yi Yang ,  Ling Li ,  Chia-Lin Liu ,  Chi-Neng Mo

Inventor： Ke-Horng Chen ,  Chi-Lin Chen ,  Yao-Yi Yang ,  Ling Li ,  Chia-Lin Liu ,  Chi-Neng Mo

IPC: H05B37/02

CPC classification number: H05B33/0818 ,  H05B33/0815

Abstract: A voltage converter for use in a backlight module stores energy of an input voltage using an inductor and outputs a plurality of output voltages accordingly. The charging path of the inductor is controlled according to the first output voltage so that the first output voltage can be stabilized. The discharging paths from the inductor to other output voltages are controlled according to the differences between other output voltages and the first output voltage so that other output voltages can also be stabilized.

Abstract translation: 用于背光模块的电压转换器使用电感器存储输入电压的能量并相应地输出多个输出电压。 根据第一输出电压来控制电感器的充电路径，使得第一输出电压可以稳定。 根据其他输出电压和第一输出电压之间的差异，从电感器到其他输出电压的放电路径进行控制，以便其他输出电压也可以稳定。

公开(公告)号：US07927929B2

公开(公告)日：2011-04-19

申请号：US12371625

申请日：2009-02-16

Applicant: Chi-Lin Chen ,  Yu-Cheng Chen ,  Hsing-Hua Wu ,  Po-Tsun Liu

Inventor： Chi-Lin Chen ,  Yu-Cheng Chen ,  Hsing-Hua Wu ,  Po-Tsun Liu

IPC: H01L29/04

CPC classification number: H01L21/268 ,  H01L21/28008 ,  H01L29/4238 ,  H01L29/4916 ,  H01L29/66757 ,  H01L29/78609 ,  H01L29/78618 ,  H01L29/78675 ,  H01L29/78696

Abstract: A method of fabricating a thin film transistor (TFT) includes first providing a strip-shaped silicon island which is a thin film region with a predetermined long side and short side. Next, the strip-shaped silicon island is subject to an ion implantation to form a first ion doping region and a second ion doping region. The first and second ion doping regions, respectively used as the source and the drain of the TFT, are located at two sides along the long side of the island and substantially perpendicular to the gate. A gate is formed over the strip-shaped silicon island and the first and second ion doping regions, wherein the gate is substantially parallel to the direction of the short side.

Abstract translation: 制造薄膜晶体管（TFT）的方法包括首先提供作为具有预定长边和短边的薄膜区域的条状硅岛。 接下来，条状硅岛经受离子注入以形成第一离子掺杂区和第二离子掺杂区。 分别用作TFT的源极和漏极的第一和第二离子掺杂区域位于岛的长边的两侧并且基本上垂直于栅极。 栅极形成在带状硅岛和第一和第二离子掺杂区之上，其中栅极基本上平行于短边的方向。

公开(公告)号：US20090142886A1

公开(公告)日：2009-06-04

申请号：US12371625

申请日：2009-02-16

Applicant: Chi-Lin Chen ,  Yu-Cheng Chen ,  Hsing-Hua Wu ,  Po-Tsun Liu

Inventor： Chi-Lin Chen ,  Yu-Cheng Chen ,  Hsing-Hua Wu ,  Po-Tsun Liu

IPC: H01L21/336

CPC classification number: H01L21/268 ,  H01L21/28008 ,  H01L29/4238 ,  H01L29/4916 ,  H01L29/66757 ,  H01L29/78609 ,  H01L29/78618 ,  H01L29/78675 ,  H01L29/78696

Abstract: A method of fabricating a thin film transistor (TFT) includes first providing a strip-shaped silicon island which is a thin film region with a predetermined long side and short side. Next, the strip-shaped silicon island is subject to an ion implantation to form a first ion doping region and a second ion doping region. The first and second ion doping regions, respectively used as the source and the drain of the TFT, are located at two sides along the long side of the island and substantially perpendicular to the gate. A gate is formed over the strip-shaped silicon island and the first and second ion doping regions, wherein the gate is substantially parallel to the direction of the short side.

Abstract translation: 制造薄膜晶体管（TFT）的方法包括首先提供作为具有预定长边和短边的薄膜区域的条状硅岛。 接下来，条状硅岛经受离子注入以形成第一离子掺杂区和第二离子掺杂区。 分别用作TFT的源极和漏极的第一和第二离子掺杂区域位于岛的长边的两侧并且基本上垂直于栅极。 栅极形成在带状硅岛和第一和第二离子掺杂区之上，其中栅极基本上平行于短边的方向。

公开(公告)号：US20080029902A1

公开(公告)日：2008-02-07

申请号：US11870426

申请日：2007-10-11

Applicant: Yu-Cheng Chen ,  Chi-Lin Chen ,  Chi-Ming Chang

Inventor： Yu-Cheng Chen ,  Chi-Lin Chen ,  Chi-Ming Chang

IPC: H01L23/52

CPC classification number: H01L27/1288 ,  G02F1/1368 ,  H01L27/124

Abstract: A multi-layered complementary conductive line structure, a manufacturing method thereof and a manufacturing method of a TFT (thin film transistor) display array are provided. The process of TFT having multi-layered complementary conductive line structures does not need to increase the mask number in comparison with the currently process and is able to solve the resistance problem of the lines inside a display.

Abstract translation: 提供多层互补导电线结构，其制造方法和TFT（薄膜晶体管）显示阵列的制造方法。 具有多层互补导电线结构的TFT的工艺与当前工艺相比不需要增加掩模数，并且能够解决显示器内部的线的电阻问题。

公开(公告)号：US20070210310A1

公开(公告)日：2007-09-13

申请号：US11561898

申请日：2006-11-21

Applicant: Chi-Lin Chen ,  Yu-Cheng Chen ,  Hsing-Hua Wu ,  Po-Tsun Liu

Inventor： Chi-Lin Chen ,  Yu-Cheng Chen ,  Hsing-Hua Wu ,  Po-Tsun Liu

IPC: H01L29/04

CPC classification number: H01L21/268 ,  H01L21/28008 ,  H01L29/4238 ,  H01L29/4916 ,  H01L29/66757 ,  H01L29/78609 ,  H01L29/78618 ,  H01L29/78675 ,  H01L29/78696

Abstract: A structure of a thin film transistor and a method for making the same are provided. The structure includes a strip-shaped silicon island, a gate, and a first and second ion doping regions. The strip-shaped silicon island is a thin film region with a predetermined long side and short side, and farther has a plurality of lateral grain boundaries substantially parallel to the short side of the silicon island. The gate is located over the silicon island and substantially parallel to the lateral grain boundaries. The first and second ion doping regions, used as source/drain regions of the TFT, are located at two sides along the long side of the island and substantially perpendicular to the gate.

Abstract translation: 提供薄膜晶体管的结构及其制造方法。 该结构包括条形硅岛，栅极以及第一和第二离子掺杂区域。 带状硅岛是具有预定的长边和短边的薄膜区域，并且还具有基本上平行于硅岛短边的多个横向晶界。 栅极位于硅岛上方并且基本上平行于横向晶界。 用作TFT的源极/漏极区域的第一和第二离子掺杂区域位于岛的长边的两侧并且基本上垂直于栅极。

公开(公告)号：US20070004308A1

公开(公告)日：2007-01-04

申请号：US11517357

申请日：2006-09-08

Applicant: Jung-Fang Chang ,  Chich-Shang Chang ,  Chi-Lin Chen

Inventor： Jung-Fang Chang ,  Chich-Shang Chang ,  Chi-Lin Chen

IPC: H01J9/24 ,  H01J9/32

CPC classification number: H01J9/241 ,  G02F1/133305 ,  G02F2001/13613 ,  H01J2217/492

Abstract: A method for manufacturing a flexible panel is disclosed, which has the following steps. First, a first substrate having a plurality of functional switches or conducting lines thereon is provided. Then, a second substrate is bonded on the functional switches or conducting lines, and the first substrate is thinned to a predetermined thickness subsequently. Afterwards, a flexible third substrate is adhered on the first substrate, wherein the first substrate is sandwiched between the second substrate and the third substrate. Finally, the second substrate is removed.

公开(公告)号：US20060051905A1

公开(公告)日：2006-03-09

申请号：US11200139

申请日：2005-08-10

Applicant: Hung-Tse Chen ,  Yu-Cheng Chen ,  Chi-Lin Chen

Inventor： Hung-Tse Chen ,  Yu-Cheng Chen ,  Chi-Lin Chen

IPC: H01L21/84 ,  H01L21/00

CPC classification number: H01L21/02675 ,  H01L21/02532 ,  H01L21/2026 ,  H01L21/32134 ,  H01L27/1285 ,  H01L29/66757

Abstract: A buffer layer, a protective layer and a poly-silicon layer are formed on a substrate in turn, and the poly-silicon layer is then patterned to form island active regions. Next, n-type ions are implanted into portions of the poly-silicon layer to form source/drain regions. Then, a dilute buffer oxide etchant is utilized to micro-etch the poly-silicon layer to change the surface morphology of the poly-silicon. Finally, a laser annealing process is performed to partially melt the poly-silicon for forming a smooth surface and activating the source/drain region of the poly-silicon simultaneously.

Abstract translation: 依次在基板上形成缓冲层，保护层和多晶硅层，然后对多晶硅层进行图案化以形成岛状有源区。 接下来，将n型离子注入到多晶硅层的部分中以形成源/漏区。 然后，使用稀释缓冲氧化物蚀刻剂来微蚀刻多晶硅层以改变多晶硅的表面形态。 最后，进行激光退火处理以部分地熔化多晶硅以形成光滑表面并同时激活多晶硅的源极/漏极区域。

公开(公告)号：US20050074930A1

公开(公告)日：2005-04-07

申请号：US10733721

申请日：2003-12-11

Applicant: Chi-Lin Chen ,  Shun-Fa Huang ,  Liang-Tang Wang

Inventor： Chi-Lin Chen ,  Shun-Fa Huang ,  Liang-Tang Wang

IPC: H01L21/20 ,  H01L21/00 ,  H01L21/336 ,  H01L29/49 ,  H01L29/786

CPC classification number: H01L29/66757 ,  H01L29/4908 ,  H01L29/66765

Abstract: A method of forming poly-silicon thin film transistors is described. An amorphous silicon thin film transistor is formed on a substrate, and then the Infrared (IR) heating process is used. A gate metal and source/drain metal are heated rapidly, and conduct heat energy to an amorphous silicon layer. Next, crystallization occurs in the amorphous silicon layer to form poly-silicon. Therefore a poly-silicon thin film transistor is produced.

Abstract translation: 描述形成多晶硅薄膜晶体管的方法。 在基板上形成非晶硅薄膜晶体管，然后使用红外（IR）加热工艺。 栅极金属和源极/漏极金属被快速加热，并将热能传导到非晶硅层。 接下来，在非晶硅层中发生结晶以形成多晶硅。 因此，制造多晶硅薄膜晶体管。

公开(公告)号：US20130098422A1

公开(公告)日：2013-04-25

申请号：US13478345

申请日：2012-05-23

Applicant: I-Min Chan ,  Chi-Lin Chen

Inventor： I-Min Chan ,  Chi-Lin Chen

IPC: H01L31/05

CPC classification number: H01L31/02013 ,  H01L31/0201 ,  H01L31/0465 ,  H01L31/05 ,  Y02E10/50

Abstract: A photovoltaic module includes a substrate, a plurality of cell sets, a first collecting electrode and a second collecting electrode. The cell sets are disposed on the substrate. Each of the cell sets includes a plurality of cell units, a bottom connecting electrode and an upper connecting electrode. The plurality of cell units are electrically connected to each other in series. The cell units are electrically connected between the bottom connecting electrode and the upper connecting electrode. The first collecting electrode is disposed on the substrate and is electrically connected to the bottom connecting electrode of every cell set. The second collecting electrode is disposed on the substrate and is electrically connected to the upper connecting electrode of every cell set. The second collecting electrode and the cell sets are substantially made of the same layer.

Abstract translation: 光伏模块包括基板，多个电池组，第一集电电极和第二集电极。 电池组设置在基板上。 每个单元组包括多个单元单元，底部连接电极和上部连接电极。 多个电池单元彼此串联电连接。 电池单元电连接在底部连接电极和上连接电极之间。 第一收集电极设置在基板上，并且电连接到每个电池组的底部连接电极。 第二集电电极设置在基板上并与每个电池组的上连接电极电连接。 第二收集电极和电池组基本上由相同的层制成。

公开(公告)号：US07851801B2

公开(公告)日：2010-12-14

申请号：US11963853

申请日：2007-12-24

Applicant: Hung-Tse Chen ,  Chi-Lin Chen ,  Yu-Cheng Chen

Inventor： Hung-Tse Chen ,  Chi-Lin Chen ,  Yu-Cheng Chen

IPC: H01L29/76

CPC classification number: H01L29/78696 ,  G11C16/0466 ,  H01L21/28282 ,  H01L27/12 ,  H01L27/1285 ,  H01L29/04 ,  H01L29/4234 ,  H01L29/66757 ,  H01L29/66833 ,  H01L29/78675 ,  H01L29/792

Abstract: A memory cell suitable for being disposed over a substrate is provided. The memory cell includes a poly-silicon island, a first dielectric layer, a trapping layer, a second dielectric layer and a control gate. The poly-silicon island is disposed on the substrate and includes a source region, a drain region and a channel region located between the source and drain regions. The channel region has a plurality of regularly arranged tips thereon. The first dielectric layer is disposed on the poly-silicon island. The trapping layer is disposed on the first dielectric layer. The second dielectric layer is disposed on the trapping layer. The control gate is disposed on the second dielectric layer. The memory cell mentioned above can be integrated into the LTPS-LCD panel or OLED panel.

Abstract translation: 提供了适于布置在基板上的存储单元。 存储单元包括多晶硅岛，第一介电层，俘获层，第二介质层和控制栅极。 多硅岛设置在衬底上，并且包括源极区，漏极区和位于源极和漏极区之间的沟道区。 通道区域在其上具有多个规则排列的尖端。 第一介电层设置在多晶硅岛上。 捕获层设置在第一介电层上。 第二介质层设置在捕获层上。 控制栅极设置在第二电介质层上。 上述存储单元可以集成到LTPS-LCD面板或OLED面板中。