公开(公告)号：US20120118712A1

公开(公告)日：2012-05-17

申请号：US13298217

申请日：2011-11-16

Applicant: Colin Johnstone

Inventor： Colin Johnstone

IPC: H01H3/16 ,  H01H29/20 ,  F16K17/36 ,  H01H35/02

CPC classification number: H01H35/143 ,  F16K17/36 ,  H01H35/027 ,  H01H35/146 ,  Y10T137/0753 ,  Y10T137/0874 ,  Y10T137/0923

Abstract: An actuator that includes a shelf having a pivot cone, a first member, a second member, a trigger pin and a trigger lever latch. The first member includes a weight, a first shaft extending upwardly from the weight and through an opening in the pivot cone, and a first plate affixed to the first shaft. The first plate is supported by the pivot cone. The second member includes a second plate resting on the first plate and a second shaft extending upwardly from the second plate. The trigger lever latch includes a first portion connected to the second shaft and a second portion extending upwardly at an angle away from the first portion. The trigger pin has an engagement surface. The trigger pin is movable between an operational state and a tripped state. The second end of the trigger lever latch is engaged with the engagement surface.

Abstract translation: 一种致动器，其包括具有枢转锥体，第一构件，第二构件，触发销和触发器杆闩锁的搁架。 第一构件包括重物，从重物向上延伸并通过枢转锥体中的开口的第一轴和固定到第一轴的第一板。 第一个板由枢轴锥体支撑。 第二构件包括搁在第一板上的第二板和从第二板向上延伸的第二轴。 触发杆闩锁包括连接到第二轴的第一部分和与远离第一部分成一定角度向上延伸的第二部分。 触发销具有接合表面。 触发销可在操作状态和跳闸状态之间移动。 触发杆闩锁的第二端与接合表面接合。

公开(公告)号：US07817762B2

公开(公告)日：2010-10-19

申请号：US11299431

申请日：2005-12-12

Applicant: Colin Johnstone ,  Eric Breakenridge

Inventor： Colin Johnstone ,  Eric Breakenridge

IPC: H04L7/02

CPC classification number: H03K5/1252 ,  H03K5/084 ,  H03K5/1534

Abstract: An apparatus and method for detecting leading pulse edges of a signal includes a controller, hysteresis threshold comparators and qualification timers. The controller uses the outputs from the timers in order to determine whether or not a transition of the input signal constitutes a leading pulse edge of the input signal.

Abstract translation: 用于检测信号的引导脉冲沿的装置和方法包括控制器，滞后阈值比较器和限定定时器。 控制器使用来自定时器的输出来确定输入信号的转换是否构成输入信号的前导脉冲沿。

公开(公告)号：US07265700B2

公开(公告)日：2007-09-04

申请号：US11475331

申请日：2006-06-27

Applicant: Colin Johnstone ,  Eric Breakenridge

Inventor： Colin Johnstone ,  Eric Breakenridge

IPC: H03M1/60

CPC classification number: G01R29/02 ,  H03K5/08 ,  H03K5/1252 ,  H03K5/1534

Abstract: Digital samples corresponding to a pulsed input signal are provided from an ADC to a memory for storage and to a pulse extraction circuit. The pulse extraction circuit detects the leading and trailing edges of pulses in the input signal. The digital samples are stored in both a Current memory buffer and a Next memory buffer. When a pulse trailing edge is detected, the Current buffer is stopped from storing further samples, the Next buffer becomes the Current buffer and a new buffer becomes the Next buffer. Digital data samples are then provided from the (previous) Current buffer after it has stopped storing samples.

公开(公告)号：US20070001887A1

公开(公告)日：2007-01-04

申请号：US11475331

申请日：2006-06-27

Applicant: Colin Johnstone ,  Eric Breakenridge

Inventor： Colin Johnstone ,  Eric Breakenridge

IPC: H03M1/12

CPC classification number: G01R29/02 ,  H03K5/08 ,  H03K5/1252 ,  H03K5/1534

Abstract: Digital samples corresponding to a pulsed input signal are provided from an ADC to a memory for storage and to a pulse extraction circuit. The pulse extraction circuit detects the leading and trailing edges of pulses in the input signal. The digital samples are stored in both a Current memory buffer and a Next memory buffer. When a pulse trailing edge is detected, the Current buffer is stopped from storing further samples, the Next buffer becomes the Current buffer and a new buffer becomes the Next buffer. Digital data samples are then provided from the (previous) Current buffer after it has stopped storing samples.

Abstract translation: 对应于脉冲输入信号的数字样本从ADC提供到用于存储的存储器和脉冲提取电路。 脉冲提取电路检测输入信号中的脉冲的前沿和后沿。 数字样本存储在当前存储器缓冲器和下一个存储器缓冲器中。 当检测到脉冲后沿时，当前缓冲区停止存储其他采样，下一个缓冲区变为当前缓冲区，新缓冲区成为下一个缓冲区。 然后在停止存储样品后，从（前一个）当前缓冲区中提供数字数据样本。

公开(公告)号：US06864689B2

公开(公告)日：2005-03-08

申请号：US10339156

申请日：2003-01-09

Applicant: Alexander Stephen ,  Daya Rasaratnam ,  Colin Johnstone

Inventor： Alexander Stephen ,  Daya Rasaratnam ,  Colin Johnstone

IPC: H04B3/48 ,  G01R27/28

CPC classification number: H04B3/48

Abstract: Attenuation of a pulsed signal traversing a cable is assessed by identifying a pulse in a signal received after traversing the cable and determining first and second reference signal levels in dependence upon characteristics of the pulse. A measurement is made of the slope of the pulse between the first and second reference signal levels (such as 25% and 75% of the peak pulse magnitude), and this measurement is used to determine an indication of the cable attenuation. The cable attenuation may in turn be used to determine a threshold for indicating loss of signal during a measurement operation.

Abstract translation: 穿过电缆的脉冲信号的衰减通过识别穿过电缆后接收到的信号中的脉冲并根据脉冲特性确定第一和第二参考信号电平来评估。 测量第一和第二参考信号电平之间的脉冲斜率（如峰值脉冲幅度的25％和75％），该测量用于确定电缆衰减的指示。 电缆衰减又可用于确定在测量操作期间指示信号丢失的阈值。

公开(公告)号：US06831453B2

公开(公告)日：2004-12-14

申请号：US10293806

申请日：2002-11-13

Applicant: Colin Johnstone ,  Alexander John Stephen

Inventor： Colin Johnstone ,  Alexander John Stephen

IPC: G01R1900

CPC classification number: H04L25/062 ,  H04L25/4925

Abstract: The magnitude of a pulse in a signal having both positive and negative polarity pulses (for example, a ternary PDH signal) is determined by measuring the magnitude of multiple samples of the signal. A reference level for the signal is determined from a plurality of these sample magnitudes, and the magnitude of a pulse in the signal is determined from the sample magnitudes and the reference level.

Abstract translation: 具有正极性和负极性脉冲（例如，三元PDH信号）的信号中的脉冲的幅度通过测量信号的多个采样的幅度来确定。 从多个这些采样幅度确定信号的参考电平，并根据采样幅度和参考电平确定信号中的脉冲幅值。

公开(公告)号：US06424628B1

公开(公告)日：2002-07-23

申请号：US09209777

申请日：1998-12-11

Applicant: Colin Johnstone ,  William Ross MacIsaac

Inventor： Colin Johnstone ,  William Ross MacIsaac

IPC: H04J116

CPC classification number: H04L1/242 ,  H04J3/0602 ,  H04J3/14 ,  H04L1/22 ,  H04L1/241

Abstract: The invention provides a method of identifying framing bits in order to correctly frame a test signal comprising a data payload in the form of a pseudo random binary sequence (PRBS), split into frames by a number of framing bits, after disruption and re-establishment of transmission of the test signal. The method comprises comparing the test signal to a comparison PRBS, and determining the position of the framing bits, or other non-payload data, based on the position of mismatches between the incoming test signal and the comparison PRBS. Errors may be deliberately introduced before transmission of the test signal, in a predetermined position relative to the non-payload data bits, so that analysis of the payload data is used to identify the framing elements.

Abstract translation: 本发明提供了一种识别成帧比特的方法，以便在伪随机二进制序列（PRBS）的形式中正确地构建包含数据有效载荷的测试信号，所述伪随机二进制序列在中断和重新建立之后被分成多个成帧位 的测试信号的传输。 该方法包括将测试信号与比较PRBS进行比较，并且基于输入测试信号和比较PRBS之间的失配位置来确定成帧位或其它非有效载荷数据的位置。 在测试信号发送之前，相对于非有效载荷数据位在预定位置可能故意引入错误，从而使用有效载荷数据的分析来识别成帧元件。