公开(公告)号：US20190088772A1

公开(公告)日：2019-03-21

申请号：US16182642

申请日：2018-11-07

Applicant: Cree, Inc.

Inventor： Khaled Fayed ,  Simon Wood

IPC: H01L29/778 ,  H01L29/06 ,  H01L29/205 ,  H01L29/417 ,  H01L29/20 ,  H01L23/522 ,  H01L23/528 ,  H01L29/423

CPC classification number: H01L29/7787 ,  H01L23/5228 ,  H01L23/5286 ,  H01L29/0696 ,  H01L29/2003 ,  H01L29/205 ,  H01L29/41758 ,  H01L29/42316 ,  H01L29/7786

Abstract: A transistor includes a plurality of gate fingers that extend in a first direction and are spaced apart from each other in a second direction, each of the gate fingers comprising at least spaced-apart and generally collinear first and second gate finger segments that are electrically connected to each other. The first gate finger segments are separated from the second gate finger segments in the first direction by a gap region that extends in the second direction. A resistor is disposed in the gap region.

公开(公告)号：US10128365B2

公开(公告)日：2018-11-13

申请号：US15587830

申请日：2017-05-05

Applicant: Cree, Inc.

Inventor： Khaled Fayed ,  Simon Wood

IPC: H01L29/778 ,  H01L29/417 ,  H01L29/423 ,  H01L23/522 ,  H01L23/528 ,  H01L29/06 ,  H01L29/20 ,  H01L29/205

Abstract: A transistor includes a plurality of gate fingers that extend in a first direction and are spaced apart from each other in a second direction, each of the gate fingers comprising at least spaced-apart and generally collinear first and second gate finger segments that are electrically connected to each other. The first gate finger segments are separated from the second gate finger segments in the first direction by a gap region that extends in the second direction. A resistor is disposed in the gap region.

公开(公告)号：US20170271329A1

公开(公告)日：2017-09-21

申请号：US15073201

申请日：2016-03-17

Applicant: Cree, Inc.

Inventor： Donald Farrell ,  Simon Wood ,  Scott Sheppard ,  Dan Namishia

IPC: H01L27/088 ,  H01L29/423 ,  H01L29/417 ,  H01L29/40

CPC classification number: H01L27/088 ,  H01L29/404 ,  H01L29/41758 ,  H01L29/4238

Abstract: A transistor device includes a source contact extending in a first direction, a gate finger extending in the first direction adjacent the source contact, and a drain contact adjacent the gate finger, wherein the gate finger is between the drain contact and the source contact. The device further includes a gate jumper extending in the first direction, a gate bus connected to the gate jumper and the gate finger, and a gate signal distribution bar that is spaced apart from the gate bus in the first direction and that connects the gate jumper to the gate finger.

公开(公告)号：US20220020874A1

公开(公告)日：2022-01-20

申请号：US17492032

申请日：2021-10-01

Applicant: Cree, Inc.

Inventor： Jeremy Fisher ,  Khaled Fayed ,  Simon Wood

IPC: H01L29/778 ,  H01L29/417 ,  H01L29/423 ,  H01L23/522 ,  H01L23/528 ,  H01L29/06 ,  H01L29/20 ,  H01L29/205

Abstract: A transistor device includes a plurality of gate fingers that extend in a first direction and are spaced apart from each other in a second direction, each of the gate fingers comprising at least spaced-apart and generally collinear first and second gate finger segments that are electrically connected to each other. The first gate finger segments are separated from the second gate finger segments in the first direction by a gap region that extends in the second direction. A resistor is disposed in the gap region.

公开(公告)号：US20200321458A1

公开(公告)日：2020-10-08

申请号：US16907983

申请日：2020-06-22

Applicant: Cree, Inc.

Inventor： Khaled Fayed ,  Simon Wood

IPC: H01L29/778 ,  H01L29/417 ,  H01L29/423 ,  H01L23/522 ,  H01L23/528 ,  H01L29/06 ,  H01L29/20 ,  H01L29/205

Abstract: A transistor includes a plurality of gate fingers that extend in a first direction and are spaced apart from each other in a second direction, each of the gate fingers comprising at least spaced-apart and generally collinear first and second gate finger segments that are electrically connected to each other. The first gate finger segments are separated from the second gate finger segments in the first direction by a gap region that extends in the second direction. A resistor is disposed in the gap region.

公开(公告)号：US10692998B2

公开(公告)日：2020-06-23

申请号：US16182642

申请日：2018-11-07

Applicant: Cree, Inc.

Inventor： Khaled Fayed ,  Simon Wood

IPC: H01L29/778 ,  H01L29/417 ,  H01L29/423 ,  H01L23/522 ,  H01L23/528 ,  H01L29/06 ,  H01L29/20 ,  H01L29/205

Abstract: A transistor includes a plurality of gate fingers that extend in a first direction and are spaced apart from each other in a second direction, each of the gate fingers comprising at least spaced-apart and generally collinear first and second gate finger segments that are electrically connected to each other. The first gate finger segments are separated from the second gate finger segments in the first direction by a gap region that extends in the second direction. A resistor is disposed in the gap region.

公开(公告)号：US09786660B1

公开(公告)日：2017-10-10

申请号：US15073201

申请日：2016-03-17

Applicant: Cree, Inc.

Inventor： Donald Farrell ,  Simon Wood ,  Scott Sheppard ,  Dan Namishia

IPC: H01L27/118 ,  H01L27/088 ,  H01L29/40 ,  H01L29/423 ,  H01L29/417

CPC classification number: H01L27/088 ,  H01L29/404 ,  H01L29/41758 ,  H01L29/4238

Abstract: A transistor device includes a source contact extending in a first direction, a gate finger extending in the first direction adjacent the source contact, and a drain contact adjacent the gate finger, wherein the gate finger is between the drain contact and the source contact. The device further includes a gate jumper extending in the first direction, a gate bus connected to the gate jumper and the gate finger, and a gate signal distribution bar that is spaced apart from the gate bus in the first direction and that connects the gate jumper to the gate finger.

公开(公告)号：US20150349727A1

公开(公告)日：2015-12-03

申请号：US14289080

申请日：2014-05-28

Applicant: Cree, Inc.

Inventor： Mitchell Flowers ,  Simon Wood ,  James W. Milligan

IPC: H03F1/56 ,  H01L29/778 ,  H01L27/06 ,  H03K5/125 ,  H01L23/495 ,  H03F3/19 ,  H03F3/21 ,  H01L29/20 ,  H01L23/31

CPC classification number: H03K5/125 ,  H01L23/3107 ,  H01L23/4334 ,  H01L23/49513 ,  H01L23/49562 ,  H01L23/66 ,  H01L2223/6655 ,  H01L2224/32245 ,  H01L2224/48091 ,  H01L2224/48247 ,  H01L2224/73265 ,  H01L2924/181 ,  H03F1/565 ,  H03F3/195 ,  H03F3/211 ,  H03F2200/451 ,  H03F2203/21103 ,  H03F2203/21106 ,  H03F2203/21139 ,  H03F2203/21142 ,  H01L2924/00014 ,  H01L2924/00012 ,  H01L2924/00

Abstract: A transistor package includes a transistor and one or more bandwidth limiting matching networks. The one or more bandwidth limiting matching networks are coupled to one of a control contact and an output contact of the transistor in order to limit the gain response of the transistor outside of a predetermined frequency band. Specifically, the transistor package has a gain roll-off greater than 0.5 dB within 200 MHz of the predetermined frequency band, while providing signal losses less than 1.0 dB inside the predetermined frequency band at a power level greater than 240 W. By providing the bandwidth limiting matching networks in the transistor package, the gain response of the transistor may be appropriately limited in order to comply with the spectral masking requirements of one or more wireless communications standards, for example, Long Term Evolution (LTE) standards.

Abstract translation: 晶体管封装包括晶体管和一个或多个带宽限制匹配网络。 一个或多个带宽限制匹配网络耦合到晶体管的控制触点和输出触点中的一个，以限制晶体管在预定频带之外的增益响应。 具体地，晶体管封装在预定频带的200MHz内具有大于0.5dB的增益滚降，同时在大于240W的功率电平下在预定频带内提供小于1.0dB的信号损耗。通过提供带宽 限制晶体管封装中的匹配网络，可以适当地限制晶体管的增益响应，以便符合一个或多个无线通信标准（例如长期演进（LTE））标准的频谱屏蔽要求。

公开(公告)号：US20150348886A1

公开(公告)日：2015-12-03

申请号：US14289334

申请日：2014-05-28

Applicant: Cree, Inc.

Inventor： Simon Wood ,  James W. Milligan ,  Chris Hermanson

IPC: H01L23/495 ,  H01L29/778 ,  H01L29/20 ,  H01L23/29 ,  H01L23/31

CPC classification number: H01L23/49562 ,  H01L23/293 ,  H01L23/3107 ,  H01L23/4334 ,  H01L23/66 ,  H01L2223/6655 ,  H01L2224/32245 ,  H01L2224/48091 ,  H01L2224/48247 ,  H01L2224/73265 ,  H01L2924/181 ,  H03F1/565 ,  H03F3/195 ,  H03F3/211 ,  H03F2200/222 ,  H03F2200/225 ,  H03F2200/387 ,  H03F2200/391 ,  H03F2200/451 ,  H01L2924/00014 ,  H01L2924/00012 ,  H01L2924/00

Abstract: A transistor package includes a lead frame, a wide band-gap transistor attached to the lead frame, and an over-mold surrounding the lead frame and the wide band-gap transistor. The wide band-gap transistor has a peak output power greater than 150 W when operated at a frequency up to 3.8 GHz. Using an over-mold along with a wide band-gap transistor in the transistor package allows the transistor package to achieve an exceptionally high efficiency, gain, and bandwidth, while keeping the manufacturing cost of the transistor package low.

Abstract translation: 晶体管封装包括引线框架，附接到引线框架的宽带隙晶体管和围绕引线框架和宽带隙晶体管的覆盖模块。 宽带隙晶体管的工作频率高达3.8 GHz时，峰值输出功率大于150 W。 与晶体管封装中的宽带隙晶体管一起使用模具可以使晶体管封装实现极高的效率，增益和带宽，同时保持晶体管封装的制造成本。

公开(公告)号：US20150296461A1

公开(公告)日：2015-10-15

申请号：US14251112

申请日：2014-04-11

Applicant: Cree, Inc.

Inventor： William Pribble ,  Simon Wood ,  James W. Milligan

IPC: H04W52/24 ,  H04B17/00

CPC classification number: H04W52/241 ,  H04B1/0458 ,  H04B1/3805 ,  H04B17/102 ,  H04B2001/0416

Abstract: A gallium nitride (GaN) radio frequency integrated circuit (RFIC) is configured to receive and amplify a low-level WiFi signal to generate a WiFi transmit signal. By using a GaN RFIC, the performance of the RFIC is significantly improved when compared to conventional RFICs for WiFi signals. In one exemplary embodiment, the RFIC has an error vector magnitude less than 29 dBc, an average power output around 29 dBm, and an average power added efficiency of greater than 25%. In additional embodiments, the RFIC has a gain greater than about 32 dB and a peak output power around −37 dB.

Abstract translation: 氮化镓（GaN）射频集成电路（RFIC）被配置为接收和放大低级WiFi信号以产生WiFi传输信号。 通过使用GaN RFIC，与用于WiFi信号的常规RFIC相比，RFIC的性能显着提高。 在一个示例性实施例中，RFIC具有小于29dBc的误差矢量幅度，大约29dBm的平均功率输出和大于25％的平均功率附加效率。 在另外的实施例中，RFIC具有大于约32dB的增益和约-37dB的峰值输出功率。