公开(公告)号：US09335759B2

公开(公告)日：2016-05-10

申请号：US14177260

申请日：2014-02-11

Applicant: GLOBALFOUNDRIES INC.

Inventor： Nicolas L. Breil ,  Oleg Gluschenkov ,  Keith Kwong Hon Wong

IPC: G06F17/50 ,  G05B19/418

CPC classification number: G05B19/41865 ,  G05B2219/32301 ,  G05B2219/45032 ,  H01L21/268 ,  H01L21/324 ,  H01L22/14 ,  H01L22/20 ,  Y02P90/02 ,  Y02P90/20 ,  Y02P90/26

Abstract: Semiconductor chips with curable out of specification measured values of an anneal-activated parameter are identified at a test step. A plurality of anneal plans are generated to include at least one of the identified semiconductor chips. A net yield improvement is calculated for each anneal plan. Each anneal plan includes the paths of a laser beam across the wafer to be irradiated, and optionally includes an azimuthal angle of the wafer as a function of time. The net yield improvement is the difference between an estimated yield improvement from selected target semiconductor chips for irradiation and an estimated yield loss due to collateral irradiation of functional semiconductor chips for each anneal plan. After simulating the net yield improvements for all the anneal plans, the anneal plan providing the greatest net yield improvement can be selected and utilized.

Abstract translation: 在测试步骤中识别具有退火激活参数的规格测量值的可固化的半导体芯片。 生成多个退火计划以包括所识别的半导体芯片中的至少一个。 对每个退火计划计算净产量改进。 每个退火计划包括穿过要照射的晶片的激光束的路径，并且可选地包括作为时间的函数的晶片的方位角。 净收益率的改善是所选择的用于照射的目标半导体芯片的估计产量提高与由于每个退火计划的功能性半导体芯片的侧向照射而导致的估计的产量损失之间的差异。 在模拟所有退火计划的净产量改进之后，可以选择和利用提供最大净产量改进的退火计划。

公开(公告)号：US20160118298A1

公开(公告)日：2016-04-28

申请号：US14992669

申请日：2016-01-11

Applicant: GLOBALFOUNDRIES Inc.

Inventor： Emre Alptekin ,  Nicolas L. Breil ,  Christian Lavoie ,  Ahmet S. Ozcan ,  Kathryn T. Schonenberg

IPC: H01L21/768 ,  H01L21/285 ,  H01L29/66

CPC classification number: H01L21/76886 ,  H01L21/28518 ,  H01L21/28568 ,  H01L21/76805 ,  H01L21/76814 ,  H01L21/76843 ,  H01L21/76855 ,  H01L21/76895 ,  H01L21/823871 ,  H01L23/485 ,  H01L23/53209 ,  H01L23/53223 ,  H01L23/53238 ,  H01L23/53266 ,  H01L27/092 ,  H01L29/41766 ,  H01L29/665 ,  H01L29/66545 ,  H01L29/78 ,  H01L2924/0002 ,  H01L2924/00

Abstract: Contact openings are formed into a dielectric material exposing a surface portion of a semiconductor substrate. An interfacial oxide layer is then formed in each contact opening and on an exposed surface portion of the interfacial oxide layer. A NiPt alloy layer is formed within each opening and on the exposed surface portion of each interfacial oxide layer. An anneal is then performed that forms a contact structure of, from bottom to top, a nickel disilicide alloy body having an inverted pyramidal shape, a Pt rich silicide cap region and an oxygen rich region. A metal contact is then formed within each contact opening and atop the oxygen rich region of each contact structure.

公开(公告)号：US10096609B2

公开(公告)日：2018-10-09

申请号：US14622997

申请日：2015-02-16

Applicant: GLOBALFOUNDRIES INC.

Inventor： Nicolas L. Breil ,  Domingo A. Ferrer ,  Keith Kwong Hon Wong

IPC: H01L23/525 ,  H01L27/112 ,  H01L23/522 ,  H01L23/532 ,  H01L21/768

Abstract: A method for forming a precision resistor or an e-fuse structure where tungsten silicon is used. The tungsten silicon layer is modified by changing the crystalline structure to a tetragonal tungsten silicon layer.

公开(公告)号：US10068920B2

公开(公告)日：2018-09-04

申请号：US15098722

申请日：2016-04-14

Applicant: GLOBALFOUNDRIES INC.

Inventor： Alexander Reznicek ,  Veeraraghavan S. Basker ,  Shogo Mochizuki ,  Nicolas L. Breil ,  Oleg Gluschenkov

IPC: H01L27/12 ,  H01L21/84 ,  H01L21/02 ,  H01L29/66 ,  H01L21/3115 ,  H01L21/324

Abstract: Relaxed silicon germanium fins are formed on a bulk silicon substrate through the lateral recrystallization of molten silicon germanium having high germanium content. Following formation of the silicon germanium fins, the silicon is selectively recessed. The resulting trenches are filled with electrically insulating material and then recessed down to the bottoms of the fins.

公开(公告)号：US09865546B2

公开(公告)日：2018-01-09

申请号：US14729298

申请日：2015-06-03

Applicant: GLOBALFOUNDRIES INC.

Inventor： Emre Alptekin ,  Nicolas L. Breil ,  Christian Lavoie ,  Ahmet S. Ozcan ,  Kathryn T. Schonenberg

IPC: H01L23/532 ,  H01L23/528 ,  H01L21/768 ,  H01L23/485

CPC classification number: H01L23/53266 ,  H01L21/28518 ,  H01L21/2855 ,  H01L21/7684 ,  H01L21/76843 ,  H01L21/76846 ,  H01L21/76855 ,  H01L21/76879 ,  H01L21/76883 ,  H01L23/485 ,  H01L23/53223 ,  H01L23/53238

Abstract: An aspect of the invention includes a method for forming a contact in a dielectric layer over a semiconductor substrate. The method may comprise: forming a contact opening in a dielectric layer over the semiconductor substrate to expose an upper portion of the semiconductor substrate; depositing a first liner layer to conformally coat the contact opening; causing a portion of the first liner layer to diffuse into the upper portion of the semiconductor substrate to form a first intermix region at the upper portion of the semiconductor substrate; depositing a refractory metal layer over the first intermix region; and depositing a metal in the contact opening thereby forming the contact.

公开(公告)号：US09236345B2

公开(公告)日：2016-01-12

申请号：US14223592

申请日：2014-03-24

Applicant: GLOBALFOUNDRIES INC.

Inventor： Emre Alptekin ,  Nicolas L. Breil ,  Christian Lavoie ,  Ahmet S. Ozcan ,  Kathryn T. Schonenberg

IPC: H01L29/78 ,  H01L23/532 ,  H01L27/092 ,  H01L23/535 ,  H01L29/423 ,  H01L29/417 ,  H01L21/285

CPC classification number: H01L21/76886 ,  H01L21/28518 ,  H01L21/28568 ,  H01L21/76805 ,  H01L21/76814 ,  H01L21/76843 ,  H01L21/76855 ,  H01L21/76895 ,  H01L21/823871 ,  H01L23/485 ,  H01L23/53209 ,  H01L23/53223 ,  H01L23/53238 ,  H01L23/53266 ,  H01L27/092 ,  H01L29/41766 ,  H01L29/665 ,  H01L29/66545 ,  H01L29/78 ,  H01L2924/0002 ,  H01L2924/00

Abstract: Contact openings are formed into a dielectric material exposing a surface portion of a semiconductor substrate. An interfacial oxide layer is then formed in each contact opening and on an exposed surface portion of the interfacial oxide layer. A NiPt alloy layer is formed within each opening and on the exposed surface portion of each interfacial oxide layer. An anneal is then performed that forms a contact structure of, from bottom to top, a nickel disilicide alloy body having an inverted pyramidal shape, a Pt rich silicide cap region and an oxygen rich region. A metal contact is then formed within each contact opening and atop the oxygen rich region of each contact structure.

Abstract translation: 接触开口形成为露出半导体衬底的表面部分的电介质材料。 然后在每个接触开口中和界面氧化物层的暴露表面部分上形成界面氧化物层。 在每个开口内和每个界面氧化物层的暴露的表面部分上形成NiPt合金层。 然后进行退火，其形成从底部到顶部具有倒金字塔形状，富Pt硅化物帽区域和富氧区域的二硅化镍合金体的接触结构。 然后在每个接触开口内和每个接触结构的富氧区顶上形成金属接触。

公开(公告)号：US20180090447A1

公开(公告)日：2018-03-29

申请号：US15826939

申请日：2017-11-30

Applicant: GLOBALFOUNDRIES INC.

Inventor： Emre Alptekin ,  Nicolas L. Breil ,  Christian Lavoie ,  Ahmet S. Ozcan ,  Kathryn T. Schonenberg

IPC: H01L23/532 ,  H01L21/768 ,  H01L23/485 ,  H01L21/285

CPC classification number: H01L23/53266 ,  H01L21/28518 ,  H01L21/2855 ,  H01L21/7684 ,  H01L21/76843 ,  H01L21/76846 ,  H01L21/76855 ,  H01L21/76879 ,  H01L21/76883 ,  H01L23/485 ,  H01L23/53223 ,  H01L23/53238

Abstract: An aspect of the invention includes a method for forming a contact in a dielectric layer over a semiconductor substrate. The method may comprise: forming a contact opening in a dielectric layer over the semiconductor substrate to expose an upper portion of the semiconductor substrate; depositing a first liner layer to conformally coat the contact opening; causing a portion of the first liner layer to diffuse into the upper portion of the semiconductor substrate to form a first intermix region at the upper portion of the semiconductor substrate; depositing a refractory metal layer over the first intermix region; and depositing a metal in the contact opening thereby forming the contact.