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公开(公告)号:US09680020B2
公开(公告)日:2017-06-13
申请号:US14794997
申请日:2015-07-09
Applicant: GLOBALFOUNDRIES INC.
Inventor: Veeraraghavan S. Basker , Chung-Hsun Lin , Zuoguang Liu , Tenko Yamashita , Chun-Chen Yeh
IPC: H01L29/78 , H01L29/66 , H01L21/8234 , H01L21/311 , H01L21/3065 , H01L29/417 , H01L29/08
CPC classification number: H01L29/7851 , H01L21/3065 , H01L21/31111 , H01L21/823418 , H01L21/823431 , H01L21/823475 , H01L29/0847 , H01L29/41791 , H01L29/66545 , H01L29/66795 , H01L29/7848
Abstract: A method for forming fin field effect transistors includes epitaxially growing source and drain (S/D) regions on fins, the S/D regions including a diamond-shaped cross section and forming a dielectric liner over the S/D regions. A dielectric fill is etched over the S/D regions to expose a top portion of the diamond-shaped cross section. The fins are recessed into the diamond-shaped cross section. A top portion of the diamond-shaped cross section of the S/D regions is exposed. A contact liner is formed on the top portion of the diamond-shaped cross section of the S/D regions and in a recess where the fins were recessed. Contacts are formed over surfaces of the top portion and in the recess.
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12.
公开(公告)号:US11562906B2
公开(公告)日:2023-01-24
申请号:US16265784
申请日:2019-02-01
Inventor: Oleg Gluschenkov , Zuoguang Liu , Shogo Mochizuki , Hiroaki Niimi , Tenko Yamashita , Chun-Chen Yeh
IPC: H01L21/285 , H01L29/08 , H01L29/24 , H01L29/267 , H01L29/78 , H01L29/66 , H01L21/768
Abstract: Techniques for forming a metastable phosphorous P-doped silicon Si source drain contacts are provided. In one aspect, a method for forming n-type source and drain contacts includes the steps of: forming a transistor on a substrate; depositing a dielectric over the transistor; forming contact trenches in the dielectric that extend down to source and drain regions of the transistor; forming an epitaxial material in the contact trenches on the source and drain regions; implanting P into the epitaxial material to form an amorphous P-doped layer; and annealing the amorphous P-doped layer under conditions sufficient to form a crystalline P-doped layer having a homogenous phosphorous concentration that is greater than about 1.5×1021 atoms per cubic centimeter (at./cm3). Transistor devices are also provided utilizing the present P-doped Si source and drain contacts.
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13.
公开(公告)号:US20190181012A1
公开(公告)日:2019-06-13
申请号:US16265784
申请日:2019-02-01
Inventor: Oleg Gluschenkov , Zuoguang Liu , Shogo Mochizuki , Hiroaki Niimi , Tenko Yamashita , Chun-chen Yeh
IPC: H01L21/285 , H01L29/66 , H01L29/24 , H01L21/768 , H01L29/08 , H01L29/78 , H01L29/267
Abstract: Techniques for forming a metastable phosphorous P-doped silicon Si source drain contacts are provided. In one aspect, a method for forming n-type source and drain contacts includes the steps of: forming a transistor on a substrate; depositing a dielectric over the transistor; forming contact trenches in the dielectric that extend down to source and drain regions of the transistor; forming an epitaxial material in the contact trenches on the source and drain regions; implanting P into the epitaxial material to form an amorphous P-doped layer; and annealing the amorphous P-doped layer under conditions sufficient to form a crystalline P-doped layer having a homogenous phosphorous concentration that is greater than about 1.5×1021 atoms per cubic centimeter (at./cm3). Transistor devices are also provided utilizing the present P-doped Si source and drain contacts.
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公开(公告)号:US10158003B2
公开(公告)日:2018-12-18
申请号:US14824349
申请日:2015-08-12
Inventor: Kangguo Cheng , Zuoguang Liu , Ruilong Xie , Tenko Yamashita
IPC: H01L29/417 , H01L29/66 , H01L21/8234 , H01L29/78 , H01L29/06 , H01L21/02 , H01L21/285 , H01L21/324 , H01L29/45 , H01L27/088 , H01L29/08 , H01L29/161 , H01L29/165 , H01L29/24 , H01L29/267
Abstract: A method of making a semiconductor device includes forming a fin in a substrate; depositing a first spacer material to form a first spacer around the fin; depositing a second spacer material to form a second spacer over the first spacer; recessing the first spacer and the second spacer; removing the first spacer; and performing an epitaxial growth process to form epitaxial growth on an end of the fin, along a sidewall of the fin, and adjacent to the fin.
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公开(公告)号:US09899525B2
公开(公告)日:2018-02-20
申请号:US15592597
申请日:2017-05-11
Applicant: GLOBALFOUNDRIES INC.
Inventor: Veeraraghavan S. Basker , Chung-Hsun Lin , Zuoguang Liu , Tenko Yamashita , Chun-Chen Yeh
IPC: H01L29/78 , H01L29/66 , H01L21/311 , H01L21/8234 , H01L29/08 , H01L29/417
CPC classification number: H01L29/7851 , H01L21/3065 , H01L21/31111 , H01L21/823418 , H01L21/823431 , H01L21/823475 , H01L29/0847 , H01L29/41791 , H01L29/66545 , H01L29/66795 , H01L29/7848
Abstract: This disclosure relates to a fin field effect transistor including a gate structure formed on a fin. Source and drain (S/D) regions are epitaxially grown on the fin adjacent to the gate structure. The S/D regions include a diamond-shaped cross section wherein the diamond-shaped cross section includes: internal sidewalls where the fin was recessed to a reduced height, and an external top portion of the diamond-shaped cross section of the S/D regions. A contact liner is formed over the internal sidewalls and the top portion of the diamond-shaped cross section of the S/D regions; and contacts are formed over the contact liner and over the internal sidewalls and the top portion of the diamond-shaped cross section of the S/D regions.
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公开(公告)号:US09508597B1
公开(公告)日:2016-11-29
申请号:US14858154
申请日:2015-09-18
Applicant: GLOBALFOUNDRIES Inc.
Inventor: Zuoguang Liu , Xin Sun , Tenko Yamashita
IPC: H01L21/8234 , H01L29/08 , H01L29/06 , H01L29/49 , H01L27/088 , H01L29/10
CPC classification number: H01L21/823431 , H01L21/823418 , H01L21/823425 , H01L27/0886 , H01L29/0657 , H01L29/0834 , H01L29/1033 , H01L29/495 , H01L29/66356 , H01L29/7391
Abstract: A method for forming a tunneling field effect transistor includes forming gate structures over a semiconductor fin on a substrate having at least two pitches between the gate structures and recessing the fin between the gate structures. A first dielectric layer is deposited over the fin to fill in a first gap between the gate structures having a smaller pitch therebetween. A second gap between the gate structures having a larger pitch is filled with a second dielectric layer. The first gap is opened by etching the first dielectric layer while the second dielectric layer protects from opening the second gap. A source region is formed on the fin in the first gap. A dielectric fills the source region in the first gaps. The second gap is opened by etching the second dielectric layer and the first dielectric layer. A drain region is formed on the fin in the second gap.
Abstract translation: 形成隧道场效应晶体管的方法包括在半导体鳍片上形成栅极结构,该栅极结构在基板上形成,栅极结构之间具有至少两个间距,并且在栅极结构之间使翅片凹陷。 第一电介质层沉积在鳍片上以填充栅极结构之间的间距较小的第一间隙。 具有较大间距的栅极结构之间的第二间隙被第二介电层填充。 通过蚀刻第一介电层来打开第一间隙,而第二介电层保护不会打开第二间隙。 源区域形成在第一间隙中的翅片上。 电介质填充第一间隙中的源极区域。 通过蚀刻第二介电层和第一介电层来打开第二间隙。 漏极区域形成在第二间隙中的鳍片上。
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