MULTILEVEL DIRECT CURRENT POWER SOURCE POWERING MULTILEVEL INVERTER

    公开(公告)号:US20250010761A1

    公开(公告)日:2025-01-09

    申请号:US18347874

    申请日:2023-07-06

    Abstract: A multi-level inverter control system includes a power storage system having a high voltage terminal, a low voltage terminal, and an intermediate voltage terminal. The intermediate voltage terminal is at a voltage between the high voltage terminal and the low voltage terminal. A multi-level inverter includes a plurality of switches, a high voltage input connected to the high voltage terminal, a low voltage input connected to the low voltage terminal, and an intermediate voltage input connected to the intermediate voltage terminal. A controller is controllably coupled to the multi-level inverter. The controller includes at least a processor and a memory. The memory stores instructions configured to cause the controller to operate the multi-level inverter in a three-level inverter mode, a full power two-level inverter mode, a first partial power two-level inverter mode and a second partial power two-level inverter mode.

    VARIABLE CURRENT GATE DRIVER AND SYSTEM
    15.
    发明公开

    公开(公告)号:US20240022161A1

    公开(公告)日:2024-01-18

    申请号:US17865482

    申请日:2022-07-15

    CPC classification number: H02M1/08 H02M7/5395 H03K17/16

    Abstract: A variable current gate driver for a transistor includes a first current control device having a first controllable output current. The first current control device is electrically connected between a first bus and an activator of the transistor, and a second current control device having a second controllable output current. The second current control device is electrically connected between the activator of the transistor and a second bus. A controller is operatively connected to the first and second current control devices to control the first and second controllable output currents to control the first and second current control devices to control activation of the transistor via the activator. The controller is operative to control the first and second current control devices to control a slew rate of the transistor.

    MULTIMODULE PACKAGE FOR MULTILEVEL INVERTER

    公开(公告)号:US20250140704A1

    公开(公告)日:2025-05-01

    申请号:US18493947

    申请日:2023-10-25

    Abstract: A power module and a multi-level inverter package is disclosed. At least four conductive traces are disposed on a substrate. Each conductive trace includes an insulation board, a gate bus disposed on the insulation board, a kelvin bus disposed on the insulation board, and a semiconductor die operating as a transistor. The semiconductor die including a drain, a gate, and a source. The drain is coupled to the conductive trace. The source is coupled to the kelvin bus and to an electrical connection off of the conductive trace. The gate is coupled to the gate bus.

    MIXED BAR AND WIRE CONDUCTOR COMBINATIONS FOR HIGH-SPEED ELECTRIC MOTORS

    公开(公告)号:US20250119002A1

    公开(公告)日:2025-04-10

    申请号:US18483181

    申请日:2023-10-09

    Abstract: Presented are electric machines with both bar and wire conductors, methods for making/using such machines, and vehicles equipped with such machines. An electric machine, such as a traction motor or electric generator, includes an outer housing, a stator fixedly mounted to the housing, and a rotor movably mounted to the housing and spaced across an airgap from the stator. Multiple magnets, such as permanent magnet blocks, are mounted on or in slots of the rotor (or the stator). A set of electromagnetic conductors extends through each radially elongated slot of the stator (or the rotor). Each conductor set includes a group of solid-wire or multistrand-wire conductors that is located adjacent the airgap. A group of hairpin or I-pin bar conductors is radially spaced from the airgap and located adjacent the wire conductors. The bar conductors have a cross-sectional area/shape that is distinct from a cross-sectional area/shape of the wire conductors.

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