公开(公告)号：US20070257302A1

公开(公告)日：2007-11-08

申请号：US11797401

申请日：2007-05-03

申请人： Chang-Seok Kang ,  Yoo-Cheol Shin ,  Jung-Dal Choi ,  Jong-Sun Sel ,  Ju-Hyung Kim ,  Sang-Hun Jeon

发明人： Chang-Seok Kang ,  Yoo-Cheol Shin ,  Jung-Dal Choi ,  Jong-Sun Sel ,  Ju-Hyung Kim ,  Sang-Hun Jeon

IPC分类号： H01L29/788 ,  H01L21/336

CPC分类号： H01L27/11521 ,  H01L21/823462 ,  H01L21/823475 ,  H01L27/115 ,  H01L27/11524 ,  H01L29/7883

摘要： A semiconductor device has a gate contact structure, including a semiconductor substrate, a polycrystalline silicon layer used as a gate electrode of a transistor, a middle conductive layer, a top metal layer having an opening exposing the polycrystalline silicon layer, and a contact plug directly contacting the polycrystalline silicon layer through the opening.

摘要翻译： 半导体器件具有栅极接触结构，包括半导体衬底，用作晶体管的栅电极的多晶硅层，中间导电层，具有暴露多晶硅层的开口的顶部金属层和直接接触的插塞 使多晶硅层通过开口接触。

公开(公告)号：US08546870B2

公开(公告)日：2013-10-01

申请号：US12622594

申请日：2009-11-20

申请人： Ju-Hyung Kim ,  Chang-Seok Kang ,  Sung-Il Chang ,  Young-Woo Park ,  Jung-Dal Choi

发明人： Ju-Hyung Kim ,  Chang-Seok Kang ,  Sung-Il Chang ,  Young-Woo Park ,  Jung-Dal Choi

IPC分类号： H01L29/792

CPC分类号： H01L29/42324 ,  H01L21/28273 ,  H01L21/28282 ,  H01L29/4234

摘要： A semiconductor device and a method of fabricating the same are provided. The semiconductor device includes a first dielectric pattern, a data storage pattern and a second dielectric pattern, which are sequentially stacked on a semiconductor substrate. A first conductive pattern is provided on the second dielectric pattern. A second conductive pattern having a greater width than the first conductive pattern is provided on the first conductive pattern.

摘要翻译： 提供半导体器件及其制造方法。 半导体器件包括依次层叠在半导体衬底上的第一电介质图案，数据存储图案和第二电介质图案。 在第二电介质图案上提供第一导电图案。 具有比第一导电图案更大的宽度的第二导电图案设置在第一导电图案上。

公开(公告)号：US20100301425A1

公开(公告)日：2010-12-02

申请号：US12856295

申请日：2010-08-13

申请人： Chang-Seok Kang ,  Yoo-Cheol Shin ,  Jung-Dal Choi ,  Jong-Sun Sel ,  Ju-Hyung Kim ,  Sang-Hun Jeon

发明人： Chang-Seok Kang ,  Yoo-Cheol Shin ,  Jung-Dal Choi ,  Jong-Sun Sel ,  Ju-Hyung Kim ,  Sang-Hun Jeon

IPC分类号： H01L27/088 ,  H01L29/78

CPC分类号： H01L27/11521 ,  H01L21/823462 ,  H01L21/823475 ,  H01L27/115 ,  H01L27/11524 ,  H01L29/7883

摘要： A semiconductor device has a gate contact structure, including a semiconductor substrate, a polycrystalline silicon layer used as a gate electrode of a transistor, a middle conductive layer, a top metal layer having an opening exposing the polycrystalline silicon layer, and a contact plug directly contacting the polycrystalline silicon layer through the opening.

摘要翻译： 半导体器件具有栅极接触结构，包括半导体衬底，用作晶体管的栅电极的多晶硅层，中间导电层，具有暴露多晶硅层的开口的顶部金属层和直接接触的接触插塞 使多晶硅层通过开口接触。

公开(公告)号：US20090121275A1

公开(公告)日：2009-05-14

申请号：US12266032

申请日：2008-11-06

申请人： Ju-Hyung Kim ,  Sung-Il Chang ,  Chang-Seok Kang ,  Jung-Dal Choi

发明人： Ju-Hyung Kim ,  Sung-Il Chang ,  Chang-Seok Kang ,  Jung-Dal Choi

IPC分类号： H01L29/788 ,  H01L29/792

CPC分类号： H01L29/792 ,  H01L21/28273 ,  H01L21/28282 ,  H01L27/115 ,  H01L27/11517 ,  H01L27/11529 ,  H01L27/11563 ,  H01L27/11568 ,  H01L29/42324 ,  H01L29/4234 ,  H01L29/42348 ,  H01L29/51 ,  H01L29/513 ,  H01L29/517 ,  H01L29/518 ,  H01L29/66825 ,  H01L29/66833 ,  H01L29/788 ,  H01L29/7883

摘要： A non-volatile memory device may include a semiconductor substrate and an isolation layer on the semiconductor substrate wherein the isolation layer defines an active region of the semiconductor substrate. A tunnel insulation layer may be provided on the active region of the semiconductor substrate, and a charge storage pattern may be provided on the tunnel insulation layer. An interface layer pattern may be provided on the charge storage pattern, and a blocking insulation pattern may be provided on the interface layer pattern. Moreover, the block insulation pattern may include a high-k dielectric material, and the interface layer pattern and the blocking insulation pattern may include different materials. A control gate electrode may be provided on the blocking insulating layer so that the blocking insulation pattern is between the interface layer pattern and the control gate electrode. Related methods are also discussed.

摘要翻译： 非易失性存储器件可以包括半导体衬底和半导体衬底上的隔离层，其中隔离层限定半导体衬底的有源区。 可以在半导体衬底的有源区上设置隧道绝缘层，并且可以在隧道绝缘层上设置电荷存储图案。 可以在电荷存储图案上提供界面层图案，并且可以在界面层图案上提供阻挡绝缘图案。 此外，块绝缘图案可以包括高k介电材料，并且界面层图案和阻挡绝缘图案可以包括不同的材料。 可以在阻挡绝缘层上设置控制栅电极，使得阻挡绝缘图案位于界面层图案和控制栅电极之间。 还讨论了相关方法。

公开(公告)号：US20080006872A1

公开(公告)日：2008-01-10

申请号：US11700315

申请日：2007-01-31

申请人： Chang-Seok Kang ,  Jung-Dal Choi ,  Ju-Hyung Kim ,  Jong-Sun Sel ,  Jae-Sung Sim ,  Sang-Hun Jeon

发明人： Chang-Seok Kang ,  Jung-Dal Choi ,  Ju-Hyung Kim ,  Jong-Sun Sel ,  Jae-Sung Sim ,  Sang-Hun Jeon

IPC分类号： H01L29/788

CPC分类号： H01L27/11568 ,  H01L27/115

摘要： Nonvolatile memory devices including device isolation patterns on a semiconductor substrate are provided. The device isolation patterns define a cell active region and a peripheral active region of the semiconductor substrate. Cell gate electrodes are provided that cross over the cell active regions. Memory cell patterns are provided between the cell gate electrodes and the cell active regions and extend toward the device isolation patterns. A tunnel insulation film is provided between the memory cell pattern and the cell active region. Related methods of fabricating nonvolatile memory devices are also provided herein.

摘要翻译： 提供包括半导体衬底上的器件隔离图案的非易失性存储器件。 器件隔离图案限定半导体衬底的单元有源区和外围有源区。 提供跨越电池有源区的电池栅电极。 在单元栅极电极和单元有源区之间提供存储单元图案，并朝向器件隔离图案延伸。 在存储单元图形和单元有源区之间设置隧道绝缘膜。 本文还提供了制造非易失性存储器件的相关方法。

公开(公告)号：US20110037118A1

公开(公告)日：2011-02-17

申请号：US12923998

申请日：2010-10-20

申请人： Ju-Hyung Kim ,  Jung-Dal Choi ,  Jang-Hyun You

发明人： Ju-Hyung Kim ,  Jung-Dal Choi ,  Jang-Hyun You

IPC分类号： H01L29/792

CPC分类号： H01L21/28282 ,  H01L27/105 ,  H01L27/11568 ,  H01L27/11573

摘要： A nonvolatile memory device and method of making the same are provided. Memory cells may be provided in a cell area wherein each memory cell has an insulative structure including a tunnel insulating layer, a floating trap layer and a blocking layer, and a conductive structure including an energy barrier layer, a barrier metal layer and a low resistance gate electrode. A material having a lower resistivity may be used as the gate electrode so as to avoid problems associated with increased resistance and to allow the gate electrode to be made relatively thin. The memory device may further include transistors in the peripheral area, which may have a gate dielectric layer, a lower gate electrode of poly-silicon and an upper gate electrode made of metal silicide, allowing an improved interface with the lower gate electrode without diffusion or reaction while providing a lower resistance.

公开(公告)号：US20060255399A1

公开(公告)日：2006-11-16

申请号：US11354076

申请日：2006-02-15

申请人： Ju-Hyung Kim ,  Jeong-Hee Han ,  Chung-Woo Kim ,  Yo-Sep Min ,  Moon-Kyung Kim ,  Youn-Seok Jeong

发明人： Ju-Hyung Kim ,  Jeong-Hee Han ,  Chung-Woo Kim ,  Yo-Sep Min ,  Moon-Kyung Kim ,  Youn-Seok Jeong

IPC分类号： H01L29/792

CPC分类号： H01L29/7881 ,  H01L29/4232 ,  H01L29/42324 ,  H01L29/513 ,  H01L29/792

摘要： Provided is a nonvolatile memory device which includes a tunneling insulating film formed on a semiconductor substrate, a storage node formed on the tunneling insulating film, a blocking insulating film formed on the storage node, and a control gate electrode formed on the blocking insulating film. The storage node includes at least two trapping films having different trap densities, and the blocking insulating film has a dielectric constant greater than that of the silicon oxide film.

摘要翻译： 提供了一种非易失性存储器件，其包括形成在半导体衬底上的隧道绝缘膜，形成在隧道绝缘膜上的存储节点，形成在存储节点上的阻挡绝缘膜，以及形成在阻挡绝缘膜上的控制栅电极。 存储节点包括具有不同陷阱密度的至少两个俘获膜，并且阻挡绝缘膜的介电常数大于氧化硅膜的介电常数。

公开(公告)号：US20060186462A1

公开(公告)日：2006-08-24

申请号：US11357329

申请日：2006-02-21

申请人： Jeong-Hee Han ,  Ju-Hyung Kim ,  Chung-Woo Kim ,  Sang-Hun Jeon ,  Youn-Seok Jeong ,  Seung-Hyun Lee

发明人： Jeong-Hee Han ,  Ju-Hyung Kim ,  Chung-Woo Kim ,  Sang-Hun Jeon ,  Youn-Seok Jeong ,  Seung-Hyun Lee

IPC分类号： H01L29/788

CPC分类号： H01L29/42324 ,  H01L29/513 ,  H01L29/792

摘要： Provided are example embodiments of fabrication methods and resulting structures suitable for use in nonvolatile memory devices formed on semiconductor substrates. The example embodiments of the gate structures include a first insulating film formed on the semiconductor substrate, a storage node formed on the first insulating film for storing charges, a second insulating film formed on the storage node, a third insulating film formed on the second insulating film, and a gate electrode formed on the third insulating film. The insulating films are selected whereby the dielectric constant of one or both of the second and third insulating films is greater than the dielectric constant of the first insulating film.

摘要翻译： 提供了适用于形成在半导体衬底上的非易失性存储器件中的制造方法和结果结构的示例性实施例。 栅极结构的示例实施例包括形成在半导体衬底上的第一绝缘膜，形成在用于存储电荷的第一绝缘膜上的存储节点，形成在存储节点上的第二绝缘膜，形成在第二绝缘层上的第三绝缘膜 膜和形成在第三绝缘膜上的栅电极。 选择绝缘膜，由此第二和第三绝缘膜中的一个或两个的介电常数大于第一绝缘膜的介电常数。

公开(公告)号：US20060017476A1

公开(公告)日：2006-01-26

申请号：US11178629

申请日：2005-07-11

申请人： Seok-Min Jung ,  Ju-Hyung Kim

发明人： Seok-Min Jung ,  Ju-Hyung Kim

IPC分类号： H03L7/06

CPC分类号： H03L7/10 ,  H03L7/0893 ,  H03L7/093

摘要： An integrated circuit device includes a fast-locking phase locked loop (PLL). This PLL includes a phase-frequency detector and first and second charge pumps, which are responsive to first and second control signals generated by the phase-frequency detector. The first and second charge pumps have different current sourcing characteristics when the first control signal is active and different current sinking characteristics when the second control signal is active.

摘要翻译： 集成电路器件包括快锁锁相环（PLL）。 该PLL包括相位检测器和第一和第二电荷泵，其响应由相位频率检测器产生的第一和第二控制信号。 当第二控制信号有效时，第一和第二电荷泵具有不同的电流源特性，当第二控制信号有效时，具有不同的电流吸收特性。

公开(公告)号：US10478275B2

公开(公告)日：2019-11-19

申请号：US15636724

申请日：2017-06-29

申请人： Ju-Hyung Kim

发明人： Ju-Hyung Kim

IPC分类号： A61D3/00 ,  A61G13/06 ,  A61B90/50 ,  A61B6/04 ,  A61B6/00

摘要： A medical diagnostic apparatus having a height-adjustable table for animals according to an embodiment of the present invention includes: a table where an animal is placed; a support stand supporting the table such that the table vertically moves and adjusting height of the table to move the table close to a floor; an X-ray detector disposed under the table and coupled to the support stand to move with the table; and an imaging stand spaced from the table, connected to the support stand, and having an X-ray tube for radiating X-rays to the X-ray detector.