摘要:
A semiconductor device has a gate contact structure, including a semiconductor substrate, a polycrystalline silicon layer used as a gate electrode of a transistor, a middle conductive layer, a top metal layer having an opening exposing the polycrystalline silicon layer, and a contact plug directly contacting the polycrystalline silicon layer through the opening.
摘要:
A nonvolatile memory device and method of making the same are provided. Memory cells may be provided in a cell area wherein each memory cell has an insulative structure including a tunnel insulating layer, a floating trap layer and a blocking layer, and a conductive structure including an energy barrier layer, a barrier metal layer and a low resistance gate electrode. A material having a lower resistivity may be used as the gate electrode so as to avoid problems associated with increased resistance and to allow the gate electrode to be made relatively thin. The memory device may further include transistors in the peripheral area, which may have a gate dielectric layer, a lower gate electrode of poly-silicon and an upper gate electrode made of metal silicide, allowing an improved interface with the lower gate electrode without diffusion or reaction while providing a lower resistance.
摘要:
A semiconductor device and a method of fabricating the same are provided. The semiconductor device includes a first dielectric pattern, a data storage pattern and a second dielectric pattern, which are sequentially stacked on a semiconductor substrate. A first conductive pattern is provided on the second dielectric pattern. A second conductive pattern having a greater width than the first conductive pattern is provided on the first conductive pattern.
摘要:
Provided is a nonvolatile memory device which includes a tunneling insulating film formed on a semiconductor substrate, a storage node formed on the tunneling insulating film, a blocking insulating film formed on the storage node, and a control gate electrode formed on the blocking insulating film. The storage node includes at least two trapping films having different trap densities, and the blocking insulating film has a dielectric constant greater than that of the silicon oxide film.
摘要:
Provided are example embodiments of fabrication methods and resulting structures suitable for use in nonvolatile memory devices formed on semiconductor substrates. The example embodiments of the gate structures include a first insulating film formed on the semiconductor substrate, a storage node formed on the first insulating film for storing charges, a second insulating film formed on the storage node, a third insulating film formed on the second insulating film, and a gate electrode formed on the third insulating film. The insulating films are selected whereby the dielectric constant of one or both of the second and third insulating films is greater than the dielectric constant of the first insulating film.
摘要:
An integrated circuit device includes a fast-locking phase locked loop (PLL). This PLL includes a phase-frequency detector and first and second charge pumps, which are responsive to first and second control signals generated by the phase-frequency detector. The first and second charge pumps have different current sourcing characteristics when the first control signal is active and different current sinking characteristics when the second control signal is active.
摘要:
A medical diagnostic apparatus having a height-adjustable table for animals according to an embodiment of the present invention includes: a table where an animal is placed; a support stand supporting the table such that the table vertically moves and adjusting height of the table to move the table close to a floor; an X-ray detector disposed under the table and coupled to the support stand to move with the table; and an imaging stand spaced from the table, connected to the support stand, and having an X-ray tube for radiating X-rays to the X-ray detector.
摘要:
A nonvolatile memory device comprises a channel pattern, a first interlayer dielectric film and a second interlayer dielectric film spaced apart from each other and stacked over each other, a gate pattern disposed between the first interlayer dielectric film and the second interlayer dielectric film, a trap layer disposed between the gate pattern and the channel pattern and a charge spreading inhibition layer disposed between the channel pattern and the first interlayer dielectric film and between the channel pattern and the second interlayer dielectric film. The charge spreading inhibition layer may include charges inside or on its surface. The charge spreading inhibition layer includes at least one of a metal oxide film or a metal nitride film or a metal oxynitride film having a greater dielectric constant than a silicon oxide film.
摘要:
A secondary battery includes an electrode unit having a first electrode plate, a second electrode plate, a separator interposed therebetween, and first and second electrode tabs respectively extending from the first and second electrode plates, a can adapted to accommodate the electrode unit and an electrolytic solution, and a cap plate adapted to seal the can and having an electrolytic solution inlet, wherein the electrolytic solution inlet has an area on one surface of the cap plate different from that on another surface of the cap plate.
摘要:
A pre-emphasis apparatus of a LVDS transmitter includes a pre-emphasis signaling generation unit and a pre-emphasis current output unit. The pre-emphasis signal generation unit generates a pre-emphasis pulse signal based on N parallel data signals received from an external source and N-phase clock signals received from a phase locked loop, where N is an integer greater than 1. The pre-emphasis current output unit provides an additional current for a pre-emphasis operation to a current source of a LVDS driver in response to the pre-emphasis pulse signal generated by the pre-emphasis pulse signal generation unit. The pulse signal for pre-emphasis is generated based on the parallel data signals received from the external source and the multi-phase clock signals, which are output from the phase locked loop for performing a sampling of the parallel data signals.