SIGNAL DISTRIBUTION FOR A QUANTUM COMPUTING SYSTEM

    公开(公告)号:US20240162050A1

    公开(公告)日:2024-05-16

    申请号:US18516711

    申请日:2023-11-21

    Applicant: Google LLC

    CPC classification number: H01L21/4857 G06N10/00 H01L23/49822 H01L33/06

    Abstract: A method of fabricating a carrier chip for distributing signals among circuit elements of a quantum computing device, includes: providing a multilayer wiring stack, the multilayer wiring stack comprising alternating layers of dielectric material and wiring; bonding a capping layer to the multilayer wiring stack, in which the capping layer includes a single crystal silicon dielectric layer; forming a via hole within the capping layer, in which the via hole extends to a first wiring layer of the multilayer wiring stack; forming an electrically conductive via within the via hole and electrically coupled to the first wiring layer; and forming a circuit element on a surface of the capping layer, in which the circuit element is directly electrically coupled to the electrically conductive via.

    INTEGRATED CIRCUIT DESIGN SYSTEM AND METHOD
    12.
    发明公开

    公开(公告)号:US20240126970A1

    公开(公告)日:2024-04-18

    申请号:US18341495

    申请日:2023-06-26

    Applicant: Google LLC

    CPC classification number: G06F30/39 G06F2111/02

    Abstract: Methods, systems, and apparatus, including computer programs encoded on a computer storage medium, for parameterization of physical dimensions of discrete circuit components for component definitions that define discrete circuit components. The component definitions may be selected for use in a device design. When a parametrization of a particular version of a discrete circuit component definition is changed, the version level of the device design is also changed and the circuit layout for the device design is physically verified for the new version level.

    Signal distribution for a quantum computing system

    公开(公告)号:US11854833B2

    公开(公告)日:2023-12-26

    申请号:US17263619

    申请日:2018-07-30

    Applicant: Google LLC

    CPC classification number: H01L21/4857 G06N10/00 H01L23/49822 H01L33/06

    Abstract: A method of fabricating a carrier chip for distributing signals among circuit elements of a quantum computing device, includes: providing a multilayer wiring stack, the multilayer wiring stack comprising alternating layers of dielectric material and wiring; bonding a capping layer to the multilayer wiring stack, in which the capping layer includes a single crystal silicon dielectric layer; forming a via hole within the capping layer, in which the via hole extends to a first wiring layer of the multilayer wiring stack; forming an electrically conductive via within the via hole and electrically coupled to the first wiring layer; and forming a circuit element on a surface of the capping layer, in which the circuit element is directly electrically coupled to the electrically conductive via.

    Transmission line resonator coupling

    公开(公告)号:US11271280B2

    公开(公告)日:2022-03-08

    申请号:US16772496

    申请日:2017-12-15

    Applicant: Google LLC

    Abstract: An apparatus includes: a transmission line resonator; and multiple resonators coupled to the transmission line resonator, in which each resonator of the multiple resonators is coupled to the transmission line resonator at a different position X along a length of the transmission line resonator, and in which, for each resonator of the multiple resonators, a coupling position Y along a length of the resonator is selected such that, upon application of a source potential to the resonator, a standing wave established in the resonator is impedance and phase matched to a standing wave established in the transmission line resonator.

    LOW FOOTPRINT RESONATOR IN FLIP CHIP GEOMETRY

    公开(公告)号:US20200321506A1

    公开(公告)日:2020-10-08

    申请号:US16753431

    申请日:2017-10-05

    Applicant: Google LLC

    Abstract: A device includes a first substrate having a principal surface; a second substrate having a principal surface, in which the first substrate is bump-bonded to the second substrate such that the principal surface of the first substrate faces the principal surface of the second substrate; a circuit element having a microwave frequency resonance mode, in which a first portion of the circuit element is arranged on the principal surface of the first substrate and a second portion of the circuit element is arranged on the principal surface of the second substrate; and a first bump bond connected to the first portion of the circuit element and to the second portion of the circuit element, in which the first superconductor bump bond provides an electrical connection between the first portion and the second portion.

    LOW FOOTPRINT RESONATOR IN FLIP CHIP GEOMETRY

    公开(公告)号:US20230056318A1

    公开(公告)日:2023-02-23

    申请号:US17902360

    申请日:2022-09-02

    Applicant: Google LLC

    Abstract: A device includes a first substrate having a principal surface; a second substrate having a principal surface, in which the first substrate is bump-bonded to the second substrate such that the principal surface of the first substrate faces the principal surface of the second substrate; a circuit element having a microwave frequency resonance mode, in which a first portion of the circuit element is arranged on the principal surface of the first substrate and a second portion of the circuit element is arranged on the principal surface of the second substrate; and a first bump bond connected to the first portion of the circuit element and to the second portion of the circuit element, in which the first superconductor bump bond provides an electrical connection between the first portion and the second portion.

    INTEGRATED CIRCUIT DESIGN SYSTEM AND METHOD

    公开(公告)号:US20210294955A1

    公开(公告)日:2021-09-23

    申请号:US17340825

    申请日:2021-06-07

    Applicant: Google LLC

    Abstract: Methods, systems, and apparatus, including computer programs encoded on a computer storage medium, for parameterization of physical dimensions of discrete circuit components for component definitions that define discrete circuit components. The component definitions may be selected for use in a device design. When a parametrization of a particular version of a discrete circuit component definition is changed, the version level of the device design is also changed and the circuit layout for the device design is physically verified for the new version level.

    SIGNAL DISTRIBUTION FOR A QUANTUM COMPUTING SYSTEM

    公开(公告)号:US20210175095A1

    公开(公告)日:2021-06-10

    申请号:US17263619

    申请日:2018-07-30

    Applicant: Google LLC

    Abstract: A method of fabricating a carrier chip for distributing signals among circuit elements of a quantum computing device, includes: providing a multilayer wiring stack, the multilayer wiring stack comprising alternating layers of dielectric material and wiring; bonding a capping layer to the multilayer wiring stack, in which the capping layer includes a single crystal silicon dielectric layer; forming a via hole within the capping layer, in which the via hole extends to a first wiring layer of the multilayer wiring stack; forming an electrically conductive via within the via hole and electrically coupled to the first wiring layer; and forming a circuit element on a surface of the capping layer, in which the circuit element is directly electrically coupled to the electrically conductive via.

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