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公开(公告)号：US20220337207A1
公开(公告)日：2022-10-20
申请号：US17763331
申请日：2020-09-23
申请人： Google LLC
IPC分类号： H03F19/00
摘要： A circuit is presented which includes a first amplifier having an input, a transmission line having first and second ends. The first end of the transmission line is coupled to an input of the first amplifier and a plurality of channels. Each channel includes a plurality of resonators arranged to read out a plurality of qubits, respectively and a readout line arranged to receive read out signals from the plurality of resonators. The readout line of each channel is coupled to the transmission line and each channel is configured to output a respective signal in a respective frequency band which is different from frequency bands of other channels in the plurality of channels.
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公开(公告)号：US11720733B2
公开(公告)日：2023-08-08
申请号：US17340825
申请日：2021-06-07
申请人： Google LLC
IPC分类号： G06F30/39 , G06F30/327 , G06F30/337 , G06F30/398 , G06F30/33 , G06F30/392 , G06F111/02 , G06F111/04
CPC分类号： G06F30/39 , G06F30/327 , G06F30/33 , G06F30/337 , G06F30/392 , G06F30/398 , G06F2111/02 , G06F2111/04
摘要： Methods, systems, and apparatus, including computer programs encoded on a computer storage medium, for parameterization of physical dimensions of discrete circuit components for component definitions that define discrete circuit components. The component definitions may be selected for use in a device design. When a parametrization of a particular version of a discrete circuit component definition is changed, the version level of the device design is also changed and the circuit layout for the device design is physically verified for the new version level.
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公开(公告)号：US11527696B2
公开(公告)日：2022-12-13
申请号：US16753431
申请日：2017-10-05
申请人： Google LLC
发明人： Julian Shaw Kelly , Evan Jeffrey
摘要： A device includes a first substrate having a principal surface; a second substrate having a principal surface, in which the first substrate is bump-bonded to the second substrate such that the principal surface of the first substrate faces the principal surface of the second substrate; a circuit element having a microwave frequency resonance mode, in which a first portion of the circuit element is arranged on the principal surface of the first substrate and a second portion of the circuit element is arranged on the principal surface of the second substrate; and a first bump bond connected to the first portion of the circuit element and to the second portion of the circuit element, in which the first superconductor bump bond provides an electrical connection between the first portion and the second portion.
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公开(公告)号：US12086689B1
公开(公告)日：2024-09-10
申请号：US18229071
申请日：2023-08-01
申请人： Google LLC
发明人： Julian Shaw Kelly , Evan Jeffrey
IPC分类号： G06N10/40 , B82Y10/00 , G06N10/00 , H01L23/00 , H01L25/04 , H01L25/065 , H01L25/07 , H01L25/075 , H10N69/00
CPC分类号： G06N10/40 , G06N10/00 , H01L24/13 , H01L24/16 , B82Y10/00 , H01L25/043 , H01L25/0657 , H01L25/074 , H01L25/0756 , H01L2224/13109 , H01L2224/13116 , H01L2224/13164 , H01L2224/13179 , H01L2224/13183 , H01L2224/13644 , H01L2225/06513 , H01L2225/06531 , H01L2225/06537 , H10N69/00
摘要： A device includes: a first chip including a plurality of qubits arranged in an array on a first side of the first chip, in which the array includes a plurality of qubit rows and a plurality of qubit columns, in which the plurality of qubits includes a first qubit row including two or more qubits and a second qubit row including two or more qubits, and in which the second qubit row is directly adjacent to the first qubit row; a second chip bonded to the first chip, in which the second chip has a first side that faces the first side of the first chip; a plurality of qubit control elements; a plurality of qubit readout resonators; and a plurality of qubit readout transmission lines.
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公开(公告)号：US11799432B2
公开(公告)日：2023-10-24
申请号：US17763331
申请日：2020-09-23
申请人： Google LLC
CPC分类号： H03F19/00 , H03F2200/165 , H03F2200/171
摘要： A circuit is presented which includes a first amplifier having an input, a transmission line having first and second ends. The first end of the transmission line is coupled to an input of the first amplifier and a plurality of channels. Each channel includes a plurality of resonators arranged to read out a plurality of qubits, respectively and a readout line arranged to receive read out signals from the plurality of resonators. The readout line of each channel is coupled to the transmission line and each channel is configured to output a respective signal in a respective frequency band which is different from frequency bands of other channels in the plurality of channels.
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公开(公告)号：US11538976B1
公开(公告)日：2022-12-27
申请号：US16933513
申请日：2020-07-20
申请人： Google LLC
发明人： Evan Jeffrey , Julian Shaw Kelly
摘要： A quantum processor includes: a first chip comprising a qubit array, in which a plurality of qubits within the qubit array define an enclosed region on the first chip, in which each qubit of the plurality of qubits that define the enclosed region is arranged to directly electromagnetically couple to an adjacent qubit of the plurality of qubits that define the enclosed region, and in which each qubit of the qubit array comprises at least two superconductor islands, and a second chip bonded to the first chip, the second chip including one or more qubit control elements, in which the qubit control elements are positioned directly over the enclosed region of the first chip.
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公开(公告)号：US20220246677A1
公开(公告)日：2022-08-04
申请号：US17610241
申请日：2019-05-10
申请人： Google LLC
发明人： Julian Shaw Kelly , Anthony Edward Megrant , Rami Barends , Charles Neill , Daniel Thomas Sank , Evan Jeffrey , Amit Vainsencher , Paul Klimov , Christopher Michael Quintana
摘要： A quantum computing device includes: a qubit; a single XYZ control line, in which the qubit and the single control line are configured and arranged such that, during operation of the quantum computing device, the single XYZ control line allows coupling of an XY qubit control flux bias, from the single XYZ control line to the qubit, over a first frequency range at a first predetermined effective coupling strength, and coupling of a Z qubit control flux bias, from the single XYZ control line to the qubit, over a second frequency range at a second predetermined effective coupling strength.
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公开(公告)号：US12120966B2
公开(公告)日：2024-10-15
申请号：US17902360
申请日：2022-09-02
申请人： Google LLC
发明人： Julian Shaw Kelly , Evan Jeffrey
CPC分类号： H10N60/805 , G06N10/00 , H01P3/003 , H01P5/022 , H01P5/028 , H01P11/001 , H10N60/0912 , H10N60/12 , H10N60/85
摘要： A device includes a first substrate having a principal surface; a second substrate having a principal surface, in which the first substrate is bump-bonded to the second substrate such that the principal surface of the first substrate faces the principal surface of the second substrate; a circuit element having a microwave frequency resonance mode, in which a first portion of the circuit element is arranged on the principal surface of the first substrate and a second portion of the circuit element is arranged on the principal surface of the second substrate; and a first bump bond connected to the first portion of the circuit element and to the second portion of the circuit element, in which the first superconductor bump bond provides an electrical connection between the first portion and the second portion.
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公开(公告)号：US20240162050A1
公开(公告)日：2024-05-16
申请号：US18516711
申请日：2023-11-21
申请人： Google LLC
发明人： Evan Jeffrey , Joshua Yousouf Mutus
IPC分类号： H01L21/48 , G06N10/00 , H01L23/498 , H01L33/06
CPC分类号： H01L21/4857 , G06N10/00 , H01L23/49822 , H01L33/06
摘要： A method of fabricating a carrier chip for distributing signals among circuit elements of a quantum computing device, includes: providing a multilayer wiring stack, the multilayer wiring stack comprising alternating layers of dielectric material and wiring; bonding a capping layer to the multilayer wiring stack, in which the capping layer includes a single crystal silicon dielectric layer; forming a via hole within the capping layer, in which the via hole extends to a first wiring layer of the multilayer wiring stack; forming an electrically conductive via within the via hole and electrically coupled to the first wiring layer; and forming a circuit element on a surface of the capping layer, in which the circuit element is directly electrically coupled to the electrically conductive via.
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公开(公告)号：US20240126970A1
公开(公告)日：2024-04-18
申请号：US18341495
申请日：2023-06-26
申请人： Google LLC
IPC分类号： G06F30/39
CPC分类号： G06F30/39 , G06F2111/02
摘要： Methods, systems, and apparatus, including computer programs encoded on a computer storage medium, for parameterization of physical dimensions of discrete circuit components for component definitions that define discrete circuit components. The component definitions may be selected for use in a device design. When a parametrization of a particular version of a discrete circuit component definition is changed, the version level of the device design is also changed and the circuit layout for the device design is physically verified for the new version level.
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