公开(公告)号：US20190179793A1

公开(公告)日：2019-06-13

申请号：US16080570

申请日：2016-03-04

Applicant: Hewlett Packard Enterprise Development LP

Inventor： Vincent W. Michna ,  Zheila N. Madanipour ,  Patrick Raymond

IPC: G06F15/173 ,  G06F15/17 ,  G06F13/40 ,  G06F15/16

Abstract: Various examples described herein provide for determining a first data input/output (I/O) type of a computing device module and a second data I/O type of an I/O switch module, where the computing device module and the I/O switch module are coupled through a backplane system that includes a retimer. In response to the first data I/O type matching the second data I/O type, a connection between the computing device module and the I/O switch module may be permitted or prevented via the retimer.

公开(公告)号：US20180253131A1

公开(公告)日：2018-09-06

申请号：US15760617

申请日：2015-09-21

Applicant: HEWLETT PACKARD ENTERPRISE DEVELOPMENT LP

Inventor： David F. Heinrich ,  David W. Engler ,  Patrick Raymond ,  William C. Hallowell

IPC: G06F1/26 ,  G06F1/30 ,  G06F12/0804 ,  G06F11/10

Abstract: Example implementations relate to a server node shutdown. For example, a system includes a control module and a secondary power supply. The control module includes a detect engine to detect an even that triggers a sequenced shutdown of a server node and prevent execution of the sequenced shutdown and execution of a data transfer. The control module also includes an initiate engine to initiate a data backup process, by a basic input/output system (BIOS) of the server node, to write data from a volatile memory location of the server node to a non-volatile memory location of the server node. The secondary power supply is to support the data backup process.

公开(公告)号：US09966678B2

公开(公告)日：2018-05-08

申请号：US15329474

申请日：2014-07-31

Applicant: HEWLETT PACKARD ENTERPRISE DEVELOPMENT LP

Inventor： Chin-Lung Chiang ,  Jyun-Jie Wang ,  Meng-Chen Wu ,  Raghavan V Venugopal ,  Patrick Raymond ,  Andrew Potter

IPC: H01R12/00 ,  H01R12/72 ,  H01R12/71 ,  H01R13/24

CPC classification number: H01R12/721 ,  H01R12/716 ,  H01R13/2457

Abstract: A Next Generation Form Factor (NGFF) connector apparatus can include a plurality of upper signal pins and an upper ground (GND) pin that is longer than other upper pins. The NGFF connector apparatus can also include a plurality of lower signal pins and a lower power (PWR) pin that is longer than other lower pins.

公开(公告)号：US11289857B2

公开(公告)日：2022-03-29

申请号：US16368809

申请日：2019-03-28

Applicant: HEWLETT PACKARD ENTERPRISE DEVELOPMENT LP

Inventor： Nilashis Dey ,  Vincent W. Michna ,  Patrick Raymond

IPC: H01R13/66 ,  H02H7/20 ,  H01R13/717 ,  H02H1/00 ,  G01R31/40 ,  H01R13/50

Abstract: An example electrical connector includes a magnetic core embedded in the overmold and encircling conductive paths therein and a Hall-effect sensor embedded in the overmold and configured to sense a magnetic field of the magnetic core. The Hall-effect sensor generates an output that indicates whether or not the supply current flowing through the connector matches the return current flowing through the connector, and this output may be used to detect stray-current faults in which current bypasses the connector to return via alternative paths such as through a device chassis. The connector may include one or more supply wires embedded in the overmold, one or more return wires embedded in the overmold, one or more supply terminals embedded in the overmold and terminating the supply wires, and one or more return terminals embedded in the overmold and terminating the return wires. The magnetic core embedded in the overmold may encircle (a) the supply terminals or the supply wires or both, and (b) the return terminals or the return wires or both.

公开(公告)号：US11251603B2

公开(公告)日：2022-02-15

申请号：US16190769

申请日：2018-11-14

Applicant: Hewlett Packard Enterprise Development LP

Inventor： Vincent W. Michna ,  David G. Carpenter ,  Patrick Raymond

IPC: H02H5/04 ,  H05K1/02 ,  H02H1/00

Abstract: Systems and methods are provided for providing thermal protection to a power backplane printed circuit board. A distributed hotspot detection grid is included in the printed circuit board, the distributed hotspot detection grid comprising a plurality of passive temperature sensors spread across the printed circuit board to measure temperature increases. The plurality of passive temperature sensors are connected to a detection circuit for comparing signals from the passive temperature sensors to a reference signal. If the temperature increases on the PCB, electrical characteristics of at least one passive temperature sensor will change, resulting in a change of the input signal to the detection circuit. When the threshold is exceeded (indicating a potential short circuit or hotspot), the detection circuit outputs a shut down signal to the one or more power supplies connected to the of the backplane printed circuit board, to avoid catastrophic damage to the printed circuit board.

公开(公告)号：US20170337102A1

公开(公告)日：2017-11-23

申请号：US15535669

申请日：2014-12-19

Applicant: HEWLETT PACKARD ENTERPRISE DEVELOPMENT LP

Inventor： David Engler ,  Mark Kapoor ,  Patrick Raymond

IPC: G06F11/07 ,  G06F1/30

CPC classification number: G06F11/0793 ,  G06F1/28 ,  G06F1/30 ,  G06F11/073 ,  G06F12/00 ,  G06F12/0802 ,  G06F12/0868 ,  G06F2212/1032 ,  G06F2212/214 ,  G06F2212/311 ,  Y02D10/13

Abstract: In one example, a processor may include a processor core with a central processing unit as well as a processor cache separate from the processor core. The processor may also include flushing circuitry. The flushing circuitry may identify a power loss event for the processor. In response, the flushing circuitry may selectively power the processor by providing power to the processor cache but not to the processor core. The flushing circuitry may further flush data content of the processor cache to a non-volatile memory separate from the processor.