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公开(公告)号:US11709529B2
公开(公告)日:2023-07-25
申请号:US17499393
申请日:2021-10-12
Applicant: HEWLETT PACKARD ENTERPRISE DEVELOPMENT LP
Inventor: David Scott Chialastri , Vincent W. Michna , Nilashis Dey , Yasir Jamal
CPC classification number: G06F1/206 , G06F1/26 , G06F11/3058
Abstract: A compute device may include one or more processors operable at variable performance levels depending upon power supplied from a compute device power supply. A baseboard management controller of the compute device may periodically calculate an adjustment value for the power supply to adjust the power delivered to the one or more processors. The adjustment value may be calculated as a function of a thermal margin between the temperature of the one or more processors over time and a thermal operating limit of the one or more processors.
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公开(公告)号:US20230099385A1
公开(公告)日:2023-03-30
申请号:US17449572
申请日:2021-09-30
Applicant: HEWLETT PACKARD ENTERPRISE DEVELOPMENT LP
Inventor: Vincent W. Michna , Yasir Jamal , Peter A. Hansen
IPC: H04N5/268
Abstract: A process includes, responsive to a computer platform being in a pre-operating system mode of operation, a first controller receiving serial data from a first external communication connector of the computer platform and the first controller providing a video output based on the serial data; and routing the video output of the first controller to a display device connector. The process includes, determining whether a video driver of the computer platform is communicating with a second controller via a second external communication connector of the computer platform. The video driver is associated with an operating system mode of operation of the computer platform. The process includes, in response to determining that the video driver is communicating with the second controller, routing a video output of the second controller to the display device connector in place of the video output of the first controller.
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公开(公告)号:US10716233B2
公开(公告)日:2020-07-14
申请号:US16066869
申请日:2016-01-29
Applicant: Hewlett Packard Enterprise Development LP
Inventor: Zheila N. Madanipour , Vincent W. Michna , Patrick Raymond , John Franz
Abstract: According to an example, a server may include a housing including a bottom portion, a first node defined by first and second printed circuit assemblies, and a second node defined by third and fourth printed circuit assemblies.
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公开(公告)号:US20200100380A1
公开(公告)日:2020-03-26
申请号:US16139261
申请日:2018-09-24
Applicant: Hewlett Packard Enterprise Development LP
Inventor: Vincent W. Michna , Nilashis Dey , Charles Cornwell , David Chialastri
Abstract: Examples described herein include a backplane keying mechanism. The backplane keying mechanism may include a backplane, a first connector, a second connector, a first block for the first connector, and a second block for the second connector. The first block and the second block may be moveable as one unit on the backplane from a first state to a second state. In the first state, the first block allows the first connect to connect to a first type of device and the second block allows the second connector to connect to the first type of device. In the second state, the first block prohibits the first connector from connecting to the first type of device and the second block prohibits the second connector from connecting to the first type of device.
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公开(公告)号:US12035068B2
公开(公告)日:2024-07-09
申请号:US17449572
申请日:2021-09-30
Applicant: HEWLETT PACKARD ENTERPRISE DEVELOPMENT LP
Inventor: Vincent W. Michna , Yasir Jamal , Peter A. Hansen
CPC classification number: H04N5/268 , G06F13/4022
Abstract: A process includes, responsive to a computer platform being in a pre-operating system mode of operation, a first controller receiving serial data from a first external communication connector of the computer platform and the first controller providing a video output based on the serial data; and routing the video output of the first controller to a display device connector. The process includes, determining whether a video driver of the computer platform is communicating with a second controller via a second external communication connector of the computer platform. The video driver is associated with an operating system mode of operation of the computer platform. The process includes, in response to determining that the video driver is communicating with the second controller, routing a video output of the second controller to the display device connector in place of the video output of the first controller.
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公开(公告)号:US11853134B2
公开(公告)日:2023-12-26
申请号:US17498925
申请日:2021-10-12
Applicant: HEWLETT PACKARD ENTERPRISE DEVELOPMENT LP
Inventor: Vincent W. Michna , David S. Chialastri , Nilashis Dey , Yasir Jamal
CPC classification number: G06F1/20 , G06F1/183 , H05K7/20254 , G06F2200/201 , H05K7/20272
Abstract: Example implementations relate to a fluid cooling assembly for a computing system, and a tool-less method of installing the fluid cooling assembly to the computing system. The fluid cooling assembly includes a plurality of cooling components, and a fluid chamber having a plurality of first fluid connectors. Further, each cooling component includes a plurality of second fluid connectors. Each first fluid connector or each second fluid connector includes a first end to protrude beyond a first surface of a circuit board of the computing system, and a second end to protrude beyond a second surface of the circuit board. Further, the first end of each first fluid connector is connected to the first end of a respective second fluid connector via the circuit board, to establish a parallel fluid flow path between the fluid chamber and each of the plurality of cooling components.
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公开(公告)号:US20200245503A1
公开(公告)日:2020-07-30
申请号:US16258887
申请日:2019-01-28
Applicant: HEWLETT PACKARD ENTERPRISE DEVELOPMENT LP
Inventor: David Chialastri , Travis J. Gaskill , Vincent W. Michna , Nilashis Dey , Patrick Raymond
Abstract: A method for balancing air flow impedance within an enclosure. The method includes determining a configuration of each hardware module of a plurality of hardware modules arranged in a housing of the enclosure. The method also includes determining impedance settings for a plurality of adjustable air flow impedance elements within the housing, based at least in part on the configurations of the plurality of hardware modules, that will balance air flow impedances of the plurality of hardware modules. The method further includes setting the plurality of adjustable air flow impedance elements according to the determined impedance settings.
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公开(公告)号:US20190179793A1
公开(公告)日:2019-06-13
申请号:US16080570
申请日:2016-03-04
Applicant: Hewlett Packard Enterprise Development LP
Inventor: Vincent W. Michna , Zheila N. Madanipour , Patrick Raymond
IPC: G06F15/173 , G06F15/17 , G06F13/40 , G06F15/16
Abstract: Various examples described herein provide for determining a first data input/output (I/O) type of a computing device module and a second data I/O type of an I/O switch module, where the computing device module and the I/O switch module are coupled through a backplane system that includes a retimer. In response to the first data I/O type matching the second data I/O type, a connection between the computing device module and the I/O switch module may be permitted or prevented via the retimer.
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公开(公告)号:US12068554B2
公开(公告)日:2024-08-20
申请号:US17587818
申请日:2022-01-28
Applicant: Hewlett Packard Enterprise Development LP
Inventor: Paul Danna , Vincent W. Michna , Chi Kim Sides
CPC classification number: H01R12/716 , H01R12/707 , H01R43/0256 , H05K3/3405
Abstract: A dual-path signal interconnect is provided. The interconnect can include a first signal trace, first and second solder pads positioned above and connected to the first signal trace, and a third solder pad. The second solder pad separates from the first solder pad. The third solder pad separates from the second solder pad and is connected to a second signal trace. The first and second solder pads are to allow a pin of a connector to be soldered to the first and second solder pads, such that, when the pin of the external connector is soldered, high-speed electrical signals from the first signal trace are routed to the connector. The second and third solder pads are to allow a conductor to be soldered to the second and third solder pads, such that, when the conductor is soldered, the high-speed electrical signals are routed to the second signal trace.
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公开(公告)号:US20230114466A1
公开(公告)日:2023-04-13
申请号:US17498925
申请日:2021-10-12
Applicant: HEWLETT PACKARD ENTERPRISE DEVELOPMENT LP
Inventor: Vincent W. Michna , David S. Chialastri , Nilashis Dey , Yasir Jamal
Abstract: Example implementations relate to a fluid cooling assembly for a computing system, and a tool-less method of installing the fluid cooling assembly to the computing system. The fluid cooling assembly includes a plurality of cooling components, and a fluid chamber having a plurality of first fluid connectors. Further, each cooling component includes a plurality of second fluid connectors. Each first fluid connector or each second fluid connector includes a first end to protrude beyond a first surface of a circuit board of the computing system, and a second end to protrude beyond a second surface of the circuit board. Further, the first end of each first fluid connector is connected to the first end of a respective second fluid connector via the circuit board, to establish a parallel fluid flow path between the fluid chamber and each of the plurality of cooling components.
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