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公开(公告)号：US10725508B2
公开(公告)日：2020-07-28
申请号：US15170617
申请日：2016-06-01
Applicant: Hewlett Packard Enterprise Development LP
Inventor： Andrew Brown , Patrick Raymond
IPC: G06F1/20 , G06F1/26 , G06F1/3234 , G06F1/3206 , G06F11/14
Abstract: Various examples described herein provide for causing operation of a cooling system of a computing device to be adjusted (e.g., reduced or disabled) during at least a portion of a backup operation, where data is copied from volatile memory of the computing device to non-volatile memory of the computing device. Some examples can be implemented with respect to a type 10 (T10) non-volatile dynamic inline memory module (NVDIMM) configuration.
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公开(公告)号：US10716233B2
公开(公告)日：2020-07-14
申请号：US16066869
申请日：2016-01-29
Applicant: Hewlett Packard Enterprise Development LP
Inventor： Zheila N. Madanipour , Vincent W. Michna , Patrick Raymond , John Franz
Abstract: According to an example, a server may include a housing including a bottom portion, a first node defined by first and second printed circuit assemblies, and a second node defined by third and fourth printed circuit assemblies.
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公开(公告)号：US10528509B2
公开(公告)日：2020-01-07
申请号：US16065877
申请日：2016-01-29
Applicant: Hewlett Packard Enterprise Development LP
Inventor： Melvin K. Benedict , Glenn H. Lupton , Michael L. Sabotta , Brian T. Purcell , Patrick Raymond
IPC: G06F13/40
Abstract: The present disclosure discloses an expansion bus device that is communicatively coupled to a plurality of input-output devices. The expansion bus device includes a plurality of input-output slots, via which the plurality of input-output devices are coupled to the expansion bus device. The expansion bus device also includes a retimer switch communicatively connected to each of the plurality of input-output slots. The retimer switch supports switching between the plurality of input-output slots.
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公开(公告)号：US20200313365A1
公开(公告)日：2020-10-01
申请号：US16368809
申请日：2019-03-28
Applicant: HEWLETT PACKARD ENTERPRISE DEVELOPMENT LP
Inventor： Nilashis Dey , Vincent W. Michna , Patrick Raymond
IPC: H01R13/66 , H01R13/717 , H02H7/20 , H02H1/00 , G01R31/40
Abstract: An example electrical connector includes a magnetic core embedded in the overmold and encircling conductive paths therein and a Hall-effect sensor embedded in the overmold and configured to sense a magnetic field of the magnetic core. The Hall-effect sensor generates an output that indicates whether or not the supply current flowing through the connector matches the return current flowing through the connector, and this output may be used to detect stray-current faults in which current bypasses the connector to return via alternative paths such as through a device chassis. The connector may include one or more supply wires embedded in the overmold, one or more return wires embedded in the overmold, one or more supply terminals embedded in the overmold and terminating the supply wires, and one or more return terminals embedded in the overmold and terminating the return wires. The magnetic core embedded in the overmold may encircle (a) the supply terminals or the supply wires or both, and (b) the return terminals or the return wires or both.
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公开(公告)号：US10788872B2
公开(公告)日：2020-09-29
申请号：US15760617
申请日：2015-09-21
Applicant: Hewlett Packard Enterprise Development LP
Inventor： David F. Heinrich , David W. Engler , Patrick Raymond , William C. Hallowell
IPC: G06F1/30 , G06F1/26 , G06F11/14 , G06F11/10 , G06F12/0804
Abstract: Example implementations relate to a server node shutdown. For example, a system includes a control module and a secondary power supply. The control module includes a detect engine to detect an even that triggers a sequenced shutdown of a server node and prevent execution of the sequenced shutdown and execution of a data transfer. The control module also includes an initiate engine to initiate a data backup process, by a basic input/output system (BIOS) of the server node, to write data from a volatile memory location of the server node to a non-volatile memory location of the server node. The secondary power supply is to support the data backup process.
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Patent Agency Ranking
公开(公告)号：US20190012286A1
公开(公告)日：2019-01-10
申请号：US16065877
申请日：2016-01-29
Applicant: Hewlett Packard Enterprise Development LP
Inventor： Melvin K. Benedict , Glenn H. Lupton , Michael L. Sabotta , Brian T. Purcell , Patrick Raymond
IPC: G06F13/40
CPC classification number: G06F13/4022 , G06F13/4068 , G06F13/4081
Abstract: The present disclosure discloses an expansion bus device that is communicatively coupled to a plurality of input-output devices. The expansion bus device includes a plurality of input-output slots, via which the plurality of input-output devices are coupled to the expansion bus device. The expansion bus device also includes a retimer switch communicatively connected to each of the plurality of input-output slots. The retimer switch supports switching between the plurality of input-output slots.
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公开(公告)号：US20180376611A1
公开(公告)日：2018-12-27
申请号：US16066869
申请日：2016-01-29
Applicant: Hewlett Packard Enterprise Development LP
Inventor： Zheila N. Madanipour , Vincent W. Michna , Patrick Raymond , John Franz
Abstract: According to an example, a server may include a housing including a bottom portion, a first node defined by first and second printed circuit assemblies, and a second node defined by third and fourth printed circuit assemblies.
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公开(公告)号：US20180275731A1
公开(公告)日：2018-09-27
申请号：US15464706
申请日：2017-03-21
Applicant: HEWLETT PACKARD ENTERPRISE DEVELOPMENT LP
Inventor： David W. Engler , David F. Heinrich , Patrick Raymond
CPC classification number: G06F1/24 , G06F9/4401 , G06F11/1417 , G06F12/0246
Abstract: In an example, a system comprises a read-only memory, and a processor. The processor to: access a first reset vector, wherein the first reset vector is associated with a first memory address, wherein the first memory address is located on the read-only memory. Responsive to the processor being reset, the processor to: access a second reset vector, wherein the second reset vector is associated with a second memory address, wherein the second memory address is different than the first memory address.
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公开(公告)号：US20170351448A1
公开(公告)日：2017-12-07
申请号：US15170617
申请日：2016-06-01
Applicant: Hewlett Packard Enterprise Development LP
Inventor： Andrew Brown , Patrick Raymond
CPC classification number: G06F1/206 , G06F1/263 , G06F1/3206 , G06F1/3234 , G06F1/325 , G06F11/1441 , G06F11/1456 , Y02D10/16 , Y02D50/20
Abstract: Various examples described herein provide for causing operation of a cooling system of a computing device to be adjusted (e.g., reduced or disabled) during at least a portion of a backup operation, where data is copied from volatile memory of the computing device to non-volatile memory of the computing device. Some examples can be implemented with respect to a type 10 (T10) non-volatile dynamic inline memory module (NVDIMM) configuration.
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公开(公告)号：US20200245503A1
公开(公告)日：2020-07-30
申请号：US16258887
申请日：2019-01-28
Applicant: HEWLETT PACKARD ENTERPRISE DEVELOPMENT LP
Inventor： David Chialastri , Travis J. Gaskill , Vincent W. Michna , Nilashis Dey , Patrick Raymond
Abstract: A method for balancing air flow impedance within an enclosure. The method includes determining a configuration of each hardware module of a plurality of hardware modules arranged in a housing of the enclosure. The method also includes determining impedance settings for a plurality of adjustable air flow impedance elements within the housing, based at least in part on the configurations of the plurality of hardware modules, that will balance air flow impedances of the plurality of hardware modules. The method further includes setting the plurality of adjustable air flow impedance elements according to the determined impedance settings.
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