公开(公告)号：US07910414B2

公开(公告)日：2011-03-22

申请号：US12591501

申请日：2009-11-20

申请人： Hee-Dong Choi ,  Sang-Gul Lee ,  Seong-Moh Seo ,  Jun-Min Lee ,  Byung-Chul Ahn

发明人： Hee-Dong Choi ,  Sang-Gul Lee ,  Seong-Moh Seo ,  Jun-Min Lee ,  Byung-Chul Ahn

IPC分类号： H01L21/00 ,  H01L21/84

CPC分类号： H01L27/1274 ,  H01L27/1214 ,  H01L27/1288 ,  H01L29/4908

摘要： A method of fabricating an array substrate includes sequentially forming a first metal layer, a first inorganic insulating layer and an intrinsic amorphous silicon layer on a substrate, the first metal layer including a first metallic material layer and a second metallic material layer; crystallizing the intrinsic amorphous silicon; forming a gate electrode, a gate line, a gate insulating layer and an active layer; forming an interlayer insulating layer including first and second contact holes respectively exposing both sides of the active layer; forming first and second ohmic contact patterns respectively contacting the both sides of the active layers, a source electrode, a drain electrode, and a data line connecting the source electrode; forming a passivation layer on the source electrode, the drain electrode; and forming a pixel electrode on the passivation layer and contacting the drain electrode.

摘要翻译： 制造阵列基板的方法包括在基板上依次形成第一金属层，第一无机绝缘层和本征非晶硅层，所述第一金属层包括第一金属材料层和第二金属材料层; 结晶本征非晶硅; 形成栅电极，栅极线，栅绝缘层和有源层; 形成包括分别暴露有源层的两侧的第一和第二接触孔的层间绝缘层; 形成分别接触有源层的两侧的第一和第二欧姆接触图案，源电极，漏电极和连接源电极的数据线; 在源极上形成钝化层，漏电极; 以及在所述钝化层上形成像素电极并与所述漏电极接触。

公开(公告)号：US08564194B2

公开(公告)日：2013-10-22

申请号：US11640398

申请日：2006-12-18

申请人： Hee-Dong Choi ,  Jae-Hee Park

发明人： Hee-Dong Choi ,  Jae-Hee Park

IPC分类号： H01J9/24 ,  H01J1/62 ,  H01J63/04

CPC分类号： H01L27/3276 ,  H01L27/12 ,  H01L27/124 ,  H01L27/1248

摘要： An organic light emitting diode device includes a gate electrode of a first transistor on a substrate; a gate insulation film on the gate electrode of the first transistor; a source electrode of a second transistor on the gate insulation film and overlapping with the gate electrode of the first transistor; a contact hole exposing the gate electrode of the first transistor and the source electrode of the second transistor; a conductive wiring in the contact hole, for electrically connecting the gate electrode of the first transistor and the source electrode of the second transistor.

摘要翻译： 一种有机发光二极管器件包括：衬底上的第一晶体管的栅电极; 第一晶体管的栅电极上的栅极绝缘膜; 栅极绝缘膜上的第二晶体管的源电极，并与第一晶体管的栅电极重叠; 暴露第一晶体管的栅电极和第二晶体管的源电极的接触孔; 接触孔中的导电布线，用于将第一晶体管的栅电极和第二晶体管的源电极电连接。

公开(公告)号：US20070152574A1

公开(公告)日：2007-07-05

申请号：US11640398

申请日：2006-12-18

申请人： Hee-Dong Choi ,  Jae-Hee Park

发明人： Hee-Dong Choi ,  Jae-Hee Park

IPC分类号： H01J1/62

CPC分类号： H01L27/3276 ,  H01L27/12 ,  H01L27/124 ,  H01L27/1248

摘要： An organic light emitting diode device includes a gate electrode of a first transistor on a substrate; a gate insulation film on the gate electrode of the first transistor; a source electrode of a second transistor on the gate insulation film and overlapping with the gate electrode of the first transistor; a contact hole exposing the gate electrode of the first transistor and the source electrode of the second transistor; a conductive wiring in the contact hole, for electrically connecting the gate electrode of the first transistor and the source electrode of the second transistor.

摘要翻译： 一种有机发光二极管器件包括：衬底上的第一晶体管的栅电极; 第一晶体管的栅电极上的栅极绝缘膜; 栅极绝缘膜上的第二晶体管的源电极，并与第一晶体管的栅电极重叠; 暴露第一晶体管的栅电极和第二晶体管的源电极的接触孔; 接触孔中的导电布线，用于将第一晶体管的栅电极和第二晶体管的源电极电连接。

公开(公告)号：US08785257B2

公开(公告)日：2014-07-22

申请号：US12829705

申请日：2010-07-02

申请人： Hee-Dong Choi ,  Hye-Young Choi ,  Doo-Seok Yang

发明人： Hee-Dong Choi ,  Hye-Young Choi ,  Doo-Seok Yang

IPC分类号： H01L21/00 ,  H01L27/12 ,  H01L29/786

CPC分类号： H01L27/1214 ,  H01L27/12 ,  H01L27/124 ,  H01L29/78648

摘要： Disclosed is array substrate including a pixel region having a switching region, a driving region and a storage region. A switching TFT in the switching region includes a first gate electrode, a first gate insulating layer, a switching active layer on the first gate insulating layer, a switching source electrode on a first switching ohmic contact layer, and a switching drain electrode on a second switching ohmic contact layer; a driving TFT in the driving region is connected to the switching TFT and includes a first gate electrode, a second gate insulating layer, a driving active layer on the second gate insulating layer, a driving source electrode on a first driving ohmic contact layer, and a driving drain electrode on a second driving ohmic contact layer; wherein at least one of the switching and driving TFTs further includes a second gate electrode over the switching or driving active layers.

摘要翻译： 公开了包括具有开关区域，驱动区域和存储区域的像素区域的阵列基板。 开关区域中的开关TFT包括第一栅极电极，第一栅极绝缘层，第一栅极绝缘层上的开关有源层，第一开关欧姆接触层上的开关源电极和第二栅极绝缘层上的开关漏极电极 开关欧姆接触层; 驱动区域中的驱动TFT连接到开关TFT，并且包括第一栅极电极，第二栅极绝缘层，第二栅极绝缘层上的驱动有源层，第一驱动欧姆接触层上的驱动源极，以及 在第二驱动欧姆接触层上的驱动漏电极; 其中所述开关和驱动TFT中的至少一个还包括位于所述开关或驱动有源层上的第二栅电极。

公开(公告)号：US20110017999A1

公开(公告)日：2011-01-27

申请号：US12591795

申请日：2009-12-01

申请人： Hee-Dong Choi

发明人： Hee-Dong Choi

IPC分类号： H01L33/00 ,  H01L21/20

CPC分类号： H01L27/124 ,  G02F1/1368 ,  H01L27/3262 ,  H01L29/78633

摘要： An array substrate includes first and second gate electrodes on a substrate; a gate insulating layer on the first and second gate electrodes; first and second active layers on the gate insulating layer; an interlayer insulating layer on the first and second active layers; first to fourth ohmic contact layers respectively contacting both sides of the first active layer and both sides of the second active layer; first and second source electrodes and first and second drain electrodes respectively on the first, third, second and fourth ohmic contact layers; a data line connected to the first source electrode; a first passivation layer connected to the first gate electrode; a power line; one end and the other end of a connection electrode respectively connected to the first drain electrode and the second gate electrode; a second passivation layer; and a pixel electrode-connected to the second drain electrode.

公开(公告)号：US20090190083A1

公开(公告)日：2009-07-30

申请号：US12421328

申请日：2009-04-09

申请人： Min-Jic Lee ,  Chang-Hoon Lee ,  Hee-Dong Choi

发明人： Min-Jic Lee ,  Chang-Hoon Lee ,  Hee-Dong Choi

IPC分类号： G02F1/1339 ,  G02F1/1337

CPC分类号： G02F1/134363 ,  G02F1/13394

摘要： An in-plane mode liquid crystal display device (LCD) is provided that is capable of improving a contrast ratio by blocking a light leakage region formed by a column spacer. The LCD includes gate and data lines that are formed on a substrate and cross each other to define pixels. A switching device, parallel first and second electrodes that generate a horizontal electric field, and a column spacer are disposed at each pixel. The column spacers are disposed between opposing substrates and are aligned with black matrix or the data lines such that the columns formed by the column spacers overlap with bent portions of the data lines.

摘要翻译： 提供了一种面内模式液晶显示装置（LCD），其能够通过阻挡由柱间隔物形成的漏光区域来提高对比度。 LCD包括形成在基板上并彼此交叉以限定像素的栅极和数据线。 在每个像素处设置开关器件，产生水平电场的平行的第一和第二电极以及列间隔物。 柱间隔件设置在相对的基板之间并且与黑矩阵或数据线对准，使得由柱间隔件形成的列与数据线的弯曲部分重叠。

公开(公告)号：US20070296881A1

公开(公告)日：2007-12-27

申请号：US11639505

申请日：2006-12-15

申请人： Hee-Dong Choi ,  Won-Hee Choi ,  Jung-Soo Heo

发明人： Hee-Dong Choi ,  Won-Hee Choi ,  Jung-Soo Heo

IPC分类号： G02F1/1333

CPC分类号： G02F1/136204 ,  G09G3/3648 ,  G09G2300/0426 ,  G09G2330/08

摘要： An array substrate for an LCD device comprises a substrate having a display region and a non-display region at periphery of the display region; a gate line along a first direction on the substrate; first and second data lines along a second direction on the substrate; a ground line along the first direction in the non-display region and dividing the non-display region into first and second regions; a first electrostatic discharge protection circuit in the first region and connected to the first data line; and a second electrostatic discharge protection circuit in the second region and connected to the second data line.

摘要翻译： 用于LCD装置的阵列基板包括在显示区域的周围具有显示区域和非显示区域的基板; 沿着基板上的第一方向的栅极线; 沿基板上的第二方向的第一和第二数据线; 在非显示区域中沿着第一方向的接地线，并且将非显示区域划分为第一和第二区域; 第一区域中的第一静电放电保护电路并连接到第一数据线; 以及第二区域中的第二静电放电保护电路，并连接到第二数据线。

公开(公告)号：US08329523B2

公开(公告)日：2012-12-11

申请号：US12654584

申请日：2009-12-23

申请人： Hee-Dong Choi ,  Ki-Sul Cho ,  Hye-Young Choi ,  Doo-Seok Yang ,  Byeong-Gyu Roh

发明人： Hee-Dong Choi ,  Ki-Sul Cho ,  Hye-Young Choi ,  Doo-Seok Yang ,  Byeong-Gyu Roh

IPC分类号： H01L21/00 ,  H01L21/84

CPC分类号： H01L27/1288 ,  G02F2001/136236 ,  H01L21/02532 ,  H01L21/02667 ,  H01L27/1214 ,  H01L27/1218 ,  H01L27/124 ,  H01L27/3244 ,  H01L29/42384 ,  H01L29/458 ,  H01L29/66765 ,  H01L2227/323

摘要： A method of fabricating an array substrate for a display device includes: forming a buffer layer on a substrate having a pixel region; sequentially forming a gate electrode of impurity-doped polycrystalline silicon, a gate insulating layer and an active layer of intrinsic polycrystalline silicon on the buffer layer in the pixel region; forming an interlayer insulating layer of an inorganic insulating material on the active layer; sequentially forming a source barrier pattern, a source ohmic contact layer and a source electrode on the interlayer insulating layer, sequentially forming a drain barrier pattern, a drain ohmic contact layer and a drain electrode on the interlayer insulating layer, and sequentially forming a first dummy pattern, a second dummy pattern and a data line on the interlayer insulating layer; forming a first passivation layer on a surface of the interlayer insulating layer including the source electrode, the drain electrode and the data line formed thereon; forming a gate line on the first passivation layer; forming a second passivation layer on a surface of the first passivation layer including the gate line formed thereon; and forming a pixel electrode on the second passivation layer.

摘要翻译： 一种制造用于显示装置的阵列基板的方法包括：在具有像素区域的基板上形成缓冲层; 在像素区域的缓冲层上依次形成杂质掺杂多晶硅的栅电极，栅极绝缘层和本征多晶硅的有源层; 在有源层上形成无机绝缘材料的层间绝缘层; 在层间绝缘层上顺序地形成源极阻挡图案，源极欧姆接触层和源电极，在层间绝缘层上依次形成漏极阻挡图案，漏极欧姆接触层和漏极，并依次形成第一虚拟 图案，第二虚设图案和数据线; 在包括形成在其上的源电极，漏电极和数据线的层间绝缘层的表面上形成第一钝化层; 在所述第一钝化层上形成栅极线; 在包括形成在其上的栅极线的第一钝化层的表面上形成第二钝化层; 以及在所述第二钝化层上形成像素电极。

公开(公告)号：US08198631B2

公开(公告)日：2012-06-12

申请号：US12813308

申请日：2010-06-10

申请人： Hee-Dong Choi ,  Hye-Young Choi ,  Jun-Min Lee

发明人： Hee-Dong Choi ,  Hye-Young Choi ,  Jun-Min Lee

IPC分类号： H01L29/04 ,  H01L21/336

CPC分类号： H01L27/1259 ,  H01L27/1214 ,  H01L27/1274 ,  H01L27/1288

摘要： Disclosed is a method of fabricating a display device that includes forming a buffer layer; forming a gate electrode of extrinsic polycrystalline silicon, a gate insulating layer, an active layer of intrinsic polycrystalline silicon and an auxiliary active layer of intrinsic amorphous silicon on the buffer layer; forming an ohmic contact layer of extrinsic amorphous silicon and contacting the auxiliary active layer, source and drain electrodes and a data line; patterning a first passivation layer, an insulating interlayer and the gate insulating layer to form a gate contact hole exposing the gate electrode; forming a gate line on the first passivation layer, made of a metal material, and contacting the gate electrode through the gate contact hole; forming a second passivation layer on the gate line; patterning the first and second passivation layers to form a drain contact hole exposing the drain electrode; and forming a pixel electrode on the second passivation layer in the pixel region and contacting the drain electrode through the drain contact hole.

摘要翻译： 公开了一种制造显示装置的方法，包括形成缓冲层; 在绝缘多晶硅上形成栅电极，栅极绝缘层，本征多晶硅的有源层和本征非晶硅的辅助有源层在缓冲层上; 形成外部非晶硅的欧姆接触层，并与辅助有源层，源极和漏极以及数据线接触; 图案化第一钝化层，绝缘中间层和栅极绝缘层，以形成暴露栅电极的栅极接触孔; 在所述第一钝化层上形成由金属材料制成的栅极线，并且通过所述栅极接触孔与所述栅电极接触; 在栅极线上形成第二钝化层; 图案化第一和第二钝化层以形成暴露漏电极的漏极接触孔; 以及在所述像素区域中的所述第二钝化层上形成像素电极，并且通过所述漏极接触孔与所述漏电极接触。

公开(公告)号：US07989850B2

公开(公告)日：2011-08-02

申请号：US12591795

申请日：2009-12-01

申请人： Hee-Dong Choi

发明人： Hee-Dong Choi

IPC分类号： H01L29/04 ,  H01L29/10 ,  H01L31/00 ,  H01L27/14 ,  H01L29/15 ,  H01L31/036 ,  H01L29/18 ,  H01L33/00 ,  H01L27/118 ,  H01L23/52 ,  H01L29/66 ,  H01L29/78 ,  H01L21/70 ,  H01L27/088 ,  H01L27/082 ,  H01L27/105 ,  H01L27/12

CPC分类号： H01L27/124 ,  G02F1/1368 ,  H01L27/3262 ,  H01L29/78633

摘要： An array substrate includes first and second gate electrodes on a substrate; a gate insulating layer on the first and second gate electrodes; first and second active layers on the gate insulating layer; an interlayer insulating layer on the first and second active layers; first to fourth ohmic contact layers respectively contacting both sides of the first active layer and both sides of the second active layer; first and second source electrodes and first and second drain electrodes respectively on the first, third, second and fourth ohmic contact layers; a data line connected to the first source electrode; a first passivation layer connected to the first gate electrode; a power line; one end and the other end of a connection electrode respectively connected to the first drain electrode and the second gate electrode; a second passivation layer; and a pixel electrode-connected to the second drain electrode.

摘要翻译： 阵列基板包括在基板上的第一和第二栅电极; 在第一和第二栅电极上的栅极绝缘层; 栅极绝缘层上的第一和第二有源层; 在第一和第二有源层上的层间绝缘层; 分别接触第一有源层的两侧和第二有源层的两侧的第一至第四欧姆接触层; 分别在第一，第三，第二和第四欧姆接触层上的第一和第二源极和第一和第二漏极; 连接到第一源电极的数据线; 连接到所述第一栅电极的第一钝化层; 电力线 连接电极的一端和另一端分别连接到第一漏电极和第二栅电极; 第二钝化层; 以及与第二漏电极连接的像素电极。