公开(公告)号：US11251115B1

公开(公告)日：2022-02-15

申请号：US17144144

申请日：2021-01-08

Applicant: Industrial Technology Research Institute

Inventor： Shao-An Yan ,  Chieh-Wei Feng ,  Tzu-Yang Ting ,  Tzu-Hao Yu ,  Chien-Hsun Chu ,  Jui-Wen Yang ,  Hsin-Cheng Lai

IPC: H01L23/498 ,  H01L21/48 ,  G06F30/3308 ,  G06F119/18

Abstract: A redistribution structure including a first redistribution layer is provided. The first redistribution layer includes a dielectric layer; at least one conductive structure located in the dielectric layer, wherein the at least one conductive structure has a width L; and at least one dummy structure located adjacent to the at least one conductive structure and located in the dielectric layer, and the at least one dummy structure has a width D, wherein there is a gap width S between the at least one dummy structure and the at least one conductive structure, and a degree of planarization DOP of the first redistribution layer is greater than or equal to 95%, wherein DOP=[1−(h/T)]*100%, and h refers to a difference between a highest height and a lowest height of a top surface of the dielectric layer; and T refers to a thickness of the at least one conductive structure.

公开(公告)号：US20210098558A1

公开(公告)日：2021-04-01

申请号：US17037737

申请日：2020-09-30

Applicant: Industrial Technology Research Institute

Inventor： Wei-Chung Chen ,  Wen-Yu Kuo ,  Chieh-Wei Feng ,  Tai-Jui Wang

IPC: H01L27/32

Abstract: An electronic device including a pixel array structure, a redistribution structure, and a plurality of conductive via structures is provided. The pixel array structure includes a plurality of signal lines. The redistribution structure overlaps the pixel array structure and includes a plurality of conductive lines. The conductive via structures electrically connect the signal lines of the pixel array structure and the conductive lines of the redistribution structure. At least one of the conductive via structures shares at least one conductive layer with the pixel array structure.

公开(公告)号：US20200212033A1

公开(公告)日：2020-07-02

申请号：US16406032

申请日：2019-05-08

Applicant: Industrial Technology Research Institute

Inventor： Yu-Hua Chung ,  Tai-Jui Wang ,  Chieh-Wei Feng

IPC: H01L27/02 ,  H01L23/522 ,  H01L23/60

Abstract: An electrostatic discharge (ESD) protection apparatus and an integrated passive device (IPD) with capacitor(s) are provided. The ESD protection apparatus includes a transistor, an impedance, and a capacitor disposed in a redistribution layer (RDL) structure of a package. The first terminal and the second terminal of the transistor are respectively coupled to a first power rail and a second power rail of the RDL structure. A first terminal of the impedance is coupled to the first power rail. A second terminal of the impedance is coupled to a control terminal of the transistor. A first terminal of the capacitor is coupled to the second terminal of the impedance. A second terminal of the capacitor is coupled to the second power rail.

公开(公告)号：US10418435B2

公开(公告)日：2019-09-17

申请号：US15691755

申请日：2017-08-31

Applicant: Industrial Technology Research Institute ,  Intellectual Property Innovation Corporation

Inventor： Tai-Jui Wang ,  Chieh-Wei Feng ,  Meng-Jung Yang ,  Wei-Han Chen ,  Shao-An Yan ,  Tsu-Chiang Chang

IPC: H01L27/12 ,  H01L27/32

Abstract: A pixel structure including a substrate, a power wire, a planarization layer, a drive circuit and a conductive structure is provided. The substrate has a layout area and a light-transmitting area located outside the layout area. The power wire is disposed on the layout area of the substrate. The power wire includes a shielding layer. The planarization layer is disposed on the substrate and covers the power wire. The drive circuit is disposed on the planarization layer and corresponds to the layout area. The drive circuit includes a first active device. The shielding layer overlaps with the first active device. The conductive structure is disposed in the planarization layer and distributed corresponding to the layout area. The power wire is electrically connected with the drive circuit through the conductive structure. A display panel is also provided.

公开(公告)号：US20190103360A1

公开(公告)日：2019-04-04

申请号：US15919222

申请日：2018-03-13

Applicant: Industrial Technology Research Institute ,  Intellectual Property Innovation Corporation

Inventor： Cheng-Hung Yu ,  Tai-Jui Wang ,  Chieh-Wei Feng ,  Shih-Kuang Chiu ,  Ming-Huan Yang

IPC: H01L23/538 ,  H01L23/00 ,  H01L23/31

Abstract: A flexible chip package is provided. The flexible chip package includes a first flexible substrate; a first redistribution layer disposed on the first flexible substrate; a second flexible substrate; a second redistribution layer disposed on the second flexible substrate; a semiconductor chip disposed between the first and second redistribution layers and electrically connected to at least one of the first and second redistribution layers; and a first bonding layer disposed between the first and second redistribution layers and encapsulating the semiconductor chip, wherein the first bonding layer, the first redistribution layer and the second redistribution layer are between the first flexible substrate and the second flexible substrate.

公开(公告)号：US09960245B1

公开(公告)日：2018-05-01

申请号：US15458984

申请日：2017-03-15

Applicant: Industrial Technology Research Institute

Inventor： Tai-Jui Wang ,  Tsu-Chiang Chang ,  Chieh-Wei Feng ,  Shao-An Yan ,  Wei-Han Chen

IPC: H01L29/76 ,  H01L29/423 ,  H01L29/786 ,  H01L29/66 ,  H01L29/417

CPC classification number: H01L29/42384 ,  H01L29/41733 ,  H01L29/66757 ,  H01L29/78675 ,  H01L29/78696

Abstract: A transistor device including a semiconductor material layer, a gate layer, and an insulation layer between the gate layer and the semiconductor material layer is provided. The semiconductor material layer includes a first conductive portion, a second conductive portion, a channel portion between the first conductive portion and the second conductive portion, and a first protruding portion formed integrally. The channel portion has a first boundary adjacent to the first conductive portion, a second boundary adjacent to the second conductive portion, a third boundary, and a fourth boundary. The third boundary and the fourth boundary connect the terminals of the first boundary and the second boundary. The first protruding portion is protruded outwardly from the third boundary of the channel portion. The first gate boundary and the second gate boundary are overlapped with the first boundary and the second boundary of the channel portion.

公开(公告)号：US20240088004A1

公开(公告)日：2024-03-14

申请号：US18452566

申请日：2023-08-21

Applicant: Industrial Technology Research Institute

Inventor： Tai-Jui Wang ,  Jui-Wen Yang ,  Chieh-Wei Feng ,  Chih Wei Lu ,  Hsien-Wei Chiu

IPC: H01L23/498 ,  H01L21/48 ,  H01L23/15

CPC classification number: H01L23/49822 ,  H01L21/486 ,  H01L23/15 ,  H01L23/49816 ,  H01L23/49827 ,  H01L23/49838

Abstract: A stacked wiring structure includes a first wiring substrate and a second wiring substrate. The first wiring substrate includes a first glass substrate, multiple first conductive through vias penetrating through the first glass substrate, and a first multi-layered redistribution wiring structure disposed on the first glass substrate. The second wiring substrate includes a second glass substrate, multiple second conductive through vias penetrating through the second glass substrate, and a second multi-layered redistribution wiring structure disposed on the second glass substrate. The first conductive through vias are electrically connected to the second conductive through vias. The first glass substrate is spaced apart from the second glass substrate. The first multi-layered redistribution wiring structure is spaced apart from the second multi-layered redistribution wiring structure by the first glass substrate and the second glass substrate.

公开(公告)号：US11776920B2

公开(公告)日：2023-10-03

申请号：US17158014

申请日：2021-01-26

Applicant: Industrial Technology Research Institute

Inventor： Tzu-Yang Ting ,  Chieh-Wei Feng ,  Tai-Jui Wang

IPC: H01L23/64 ,  H01L23/498 ,  H01L49/02 ,  H03H7/01 ,  H01G4/30 ,  H01G4/012 ,  H01G4/40 ,  H01F27/40 ,  H01L23/552

CPC classification number: H01L23/642 ,  H01F27/40 ,  H01G4/012 ,  H01G4/30 ,  H01G4/40 ,  H01L23/49822 ,  H01L23/552 ,  H01L23/645 ,  H01L28/60 ,  H03H7/0115

Abstract: Provided a filter and a redistribution layer structure including the same. The capacitor includes a first electrode, a second electrode, a third electrode, a dielectric layer, and a conductive through via. The second electrode is disposed above the first electrode. The third electrode is disposed between the first electrode and the second electrode. The dielectric layer is disposed between the first electrode and the third electrode and between the second electrode and the third electrode. The conductive through via penetrates the dielectric layer and the third electrode to be connected to the first electrode and the second electrode, and is electrically separated from the third electrode. The first electrode and the second electrode are signal electrodes, and the third electrode is a ground electrode.

公开(公告)号：US20230165529A1

公开(公告)日：2023-06-01

申请号：US17584394

申请日：2022-01-26

Applicant: Industrial Technology Research Institute

Inventor： Yu-Hua Chung ,  Tai-Jui Wang ,  Chieh-Wei Feng ,  Tzu-Yang Ting ,  Jui-Wen Yang

IPC: A61B5/00 ,  A61B5/263 ,  A61B5/277 ,  A61B5/271

CPC classification number: A61B5/683 ,  A61B5/7203 ,  A61B5/263 ,  A61B5/277 ,  A61B5/271 ,  A61B2562/046

Abstract: A physiological sensing device is provided, including an electronic component, a coupled sensing electrode, a coupling dielectric layer, and a wire layer. The coupled sensing electrode is configured to sense a physiological signal of an object, wherein there is a capacitance value between the object and the coupled sensing electrode. The coupling dielectric layer is disposed under the coupled sensing electrode, so that the capacitance value is between 1 nF and 10 nF. The wire layer is electrically connected to the electronic component and the coupled sensing electrode.

公开(公告)号：US20230071946A1

公开(公告)日：2023-03-09

申请号：US17707964

申请日：2022-03-30

Applicant: Industrial Technology Research Institute

Inventor： Chieh-Wei Feng ,  Tai-Jui Wang ,  Jui-Wen Yang ,  Tzu-Yang Ting

IPC: H01L23/498 ,  G01R1/073 ,  H01L23/66

Abstract: The present disclosure provides a package structure, an antenna module, and a probe card. The package structure includes a connection member and a first redistribution structure disposed on the connection member. The connection member includes a conductive connector and an insulation layer surrounding the conductive connector. The first redistribution structure includes a first dielectric layer, and a first wiring pattern, and a first device. The first dielectric layer is disposed on the connection member. The first wiring pattern is disposed in the first dielectric layer. The first device is disposed above the first dielectric layer and is electrically connected to the conductive connector.