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公开(公告)号:US20250112196A1
公开(公告)日:2025-04-03
申请号:US18478843
申请日:2023-09-29
Applicant: Intel Corporation
Inventor: Feras Eid , Johanna Swan , Adel Elsherbini , Thomas L. Sounart , Tushar Kanti Talukdar , Brandon M. Rawlings , Kimin Jun , Andrey Vyatskikh , Shawna M. Liff
IPC: H01L23/00 , H01L21/48 , H01L21/683 , H01L23/373 , H01L23/38 , H01L23/433 , H01L23/538 , H10N19/00
Abstract: An embodiment discloses an electronic device, comprising an integrated circuit (IC) die, a mesa structure formed on the IC die, and a die bonded to the IC die through the mesa structure.
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公开(公告)号:US20250112067A1
公开(公告)日:2025-04-03
申请号:US18478963
申请日:2023-09-29
Applicant: Intel Corporation
Inventor: Thomas L. Sounart , Feras Eid , Tushar Kanti Talukdar , Adel Elsherbini , Carlos Bedoya Arroyave , Johanna Swan
IPC: H01L21/67 , H01L21/56 , H01L21/683 , H01L21/762
Abstract: In one embodiment, a selective transfer process includes forming a layer of integrated circuit (IC) components on a first substrate. The method also includes dispensing liquid droplets into a subset of a plurality of areas of a second substrate, where the areas of the second substrate are defined by hydrophobic lines patterned to match a layout of the IC components on the first substrate. The method further includes partially bonding the first substrate to the second substrate, where a subset of the IC components on the first substrate are bonded to the liquid droplets on the second substrate (e.g., via capillary forces), and separating the first substrate from the second substrate. When the first substrate is separated from the second substrate, the subset of IC components is separated from the first substrate and remain on the second substrate.
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公开(公告)号:US20250108459A1
公开(公告)日:2025-04-03
申请号:US18478770
申请日:2023-09-29
Applicant: INTEL CORPORATION
Inventor: Andrey Vyatskikh , Feras Eid , Tushar Kanti Talukdar , Kimin Jun , Thomas L. Sounart , Jeffery D. Bielefeld , Grant M. Kloster , Carlos Bedoya Arroyave , Golsa Naderi , Adel Elsherbini
IPC: B23K26/40 , B23K26/53 , B23K101/40 , B23K103/00
Abstract: An embodiment discloses a method comprising receiving a substrate comprising a first layer, a second layer over the first layer, and a third layer over the second layer, the third layer comprising a plurality of integrated circuit (IC) components, and applying a laser to ablate portions of the first layer, wherein the second layer protects the third layer from cracking during application of the laser.
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公开(公告)号:US20250105136A1
公开(公告)日:2025-03-27
申请号:US18473887
申请日:2023-09-25
Applicant: Intel Corporation
Inventor: Kimin Jun , Adel A. Elsherbini , Chia-Ching Lin , Sou-Chi Chang , Thomas Lee Sounart , Tushar Kanti Talukdar , Johanna Marie Swan , Uygar Avci
IPC: H01L23/522 , H01L23/00 , H01L23/498 , H01L23/528 , H01L23/538 , H01L25/065 , H01L25/16
Abstract: Capacitors for use with integrated circuit packages are disclosed. An example apparatus includes a semiconductor substrate, a metal layer coupled to the semiconductor substrate, a dielectric layer coupled to the metal layer, the dielectric layer including a capacitor disposed therein, and an interface layer positioned between the metal layer and the dielectric layer, the interface layer in contact with the dielectric layer and in contact with the metal layer.
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