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公开(公告)号:US20210318971A1
公开(公告)日:2021-10-14
申请号:US17208336
申请日:2021-03-22
Applicant: Intel Corporation
Inventor: Gaurav Khanna , Prashant Sethi , Venkatesh Ramamurthy
IPC: G06F13/24
Abstract: An example compute node is disclosed that includes a plurality of processor cores. The example further includes an operating system (OS) having an OS power management (OSPM) engine to determine that a first of the plurality of processor cores has entered an idle state; and a system management mode (SMM) handler to detect a system management interrupt (SMI) and transition control of hardware resources of the first processor core from the OS to a basic input output system (BIOS) to enter a system management mode (SMM) in order to perform one or more platform management operations.
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公开(公告)号:US10592254B2
公开(公告)日:2020-03-17
申请号:US15695499
申请日:2017-09-05
Applicant: Intel Corporation
Inventor: Rajesh Poornachandran , Vincent J. Zimmer , Karunakara Kotary , Venkatesh Ramamurthy , Pralhad M. Madhavi
IPC: G06F9/00 , G06F15/177 , G06F9/4401 , G06F1/3203 , G06F1/3287 , G06F1/3212
Abstract: Technologies for fast low-power startup include a computing device with a processor having a power management integrated circuit. The computing device initializes platform components into a low-power state and determines, in a pre-boot firmware environment, the battery state of the computing device. The computing device determines a minimum-power startup (MPS) configuration that identifies platform components to be energized and determines whether the battery state is sufficient for the MPS configuration. If sufficient, the computing device energizes the platform components of the MPS configuration and boots into an MPS boot mode. In the MPS boot mode, the computing device may execute one or more user-configured application(s). If the battery state is sufficient for normal operation, the computing device may boot into a normal mode. In the normal mode, the user may configure the MPS configuration by selecting features for the future MPS boot mode. Other embodiments are described and claimed.
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公开(公告)号:US09596085B2
公开(公告)日:2017-03-14
申请号:US14127218
申请日:2013-06-13
Applicant: Intel Corporation
Inventor: Gyan Prakash , Venkatesh Ramamurthy , Rajesh Poornachandran , Hong Li , Jesse Walker
CPC classification number: H04L9/3226 , G06F21/44 , G06F2221/2129 , H04L9/3263
Abstract: An embodiment includes a method executed by at least one processor comprising: an out-of-band cryptoprocessor receiving security credentials from a battery, which is included in a mobile computing node that comprises the at least one processor, while the mobile computing node is engaged in at least one of (a) booting, and (b) exchanging the battery after booting and during run-time; the cryptoprocessor accessing an authentication key; and the cryptoprocessor successfully authenticating the battery, via out-of-band processing, based on the security credentials and the authentication key. In an embodiment the security credentials are included in a certificate. Other embodiments are described herein.
Abstract translation: 一个实施例包括由至少一个处理器执行的方法,包括:带外密码处理器,其接收来自电池的安全凭证,其包括在包括所述至少一个处理器的移动计算节点中,同时所述移动计算节点被接合 (a)引导中的至少一个,以及(b)在引导之后和运行期间更换电池; 密码处理器访问认证密钥; 并且密码处理器通过带外处理,基于安全证书和认证密钥来成功地认证电池。 在一个实施例中,安全证书包括在证书中。 本文描述了其它实施例。
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公开(公告)号:US09514448B2
公开(公告)日:2016-12-06
申请号:US13729595
申请日:2012-12-28
Applicant: Intel Corporation
Inventor: Gyan Prakash , Nagasubramanian Gurumoorthly , Saurabh Dadu , Venkatesh Ramamurthy , Rama Sawhney
CPC classification number: G06Q10/1097 , G01C21/00 , G06F3/01 , G06Q10/109 , G06Q99/00 , H04L51/12 , H04L51/16 , H04L67/22 , H04W4/029
Abstract: Technologies for generating tasks from communication messages includes a mobile computing device for monitoring communication messages, parsing the communication messages to detect content indicative of upcoming tasks, generating a task for each of the upcoming tasks detected, generating a task list from the generated tasks, and generating an alarm for each task. Additionally, the mobile computing device receives tasks generated by a cloud server.
Abstract translation: 用于从通信消息生成任务的技术包括用于监视通信消息的移动计算设备,解析通信消息以检测指示即将到来的任务的内容,为检测到的每个即将到来的任务生成任务,从所生成的任务生成任务列表,以及 为每个任务生成一个警报。 此外,移动计算设备接收由云服务器生成的任务。
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公开(公告)号:US09041516B2
公开(公告)日:2015-05-26
申请号:US13652621
申请日:2012-10-16
Applicant: Intel Corporation
Inventor: Venkatesh Ramamurthy , Gyan Prakash
CPC classification number: G06K7/01 , G06F1/3203 , G06F1/3209 , G06K19/0727
Abstract: A device includes a processor having a standby state, a control unit coupled to the processor to receive wireless identification information, and a storage device to store a processor wake policy. The control unit applies the policy to received wireless identification information to wake the processor.
Abstract translation: 一种设备包括具有待机状态的处理器,耦合到处理器以接收无线识别信息的控制单元,以及存储处理器唤醒策略的存储设备。 控制单元将策略应用于接收到的无线识别信息以唤醒处理器。
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公开(公告)号:US20220129031A1
公开(公告)日:2022-04-28
申请号:US17520296
申请日:2021-11-05
Applicant: Intel Corporation
Inventor: Vasudevan Srinivasan , Krishnakanth V. Sistla , Corey D. Gough , Ian M. Steiner , Nikhil Gupta , Vivek Garg , Ankush Varma , Sujal A. Vora , David P. Lerner , Joseph M. Sullivan , Nagasubramanian Gurumoorthy , William J. Bowhill , Venkatesh Ramamurthy , Chris MacNamara , John J. Browne , Ripan Das
IPC: G06F1/08 , G06F1/3203 , G06F9/30 , G06F9/455 , G06F1/324
Abstract: A processing device includes a plurality of processing cores, a control register, associated with a first processing core of the plurality of processing cores, to store a first base clock frequency value at which the first processing core is to run, and a power management circuit to receive a base clock frequency request comprising a second base clock frequency value, store the second base clock frequency value in the control register to cause the first processing core to run at the second base clock frequency value, and expose the second base clock frequency value on a hardware interface associated with the power management circuit.
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17.
公开(公告)号:US11157064B2
公开(公告)日:2021-10-26
申请号:US15719276
申请日:2017-09-28
Applicant: INTEL CORPORATION
Inventor: Bharat S. Pillilli , Eswaramoorthi Nallusamy , Ramamurthy Krithivas , Vivek Garg , Venkatesh Ramamurthy
IPC: G06F1/3287 , G06F1/28 , G06F1/26
Abstract: Various embodiments are generally directed to an apparatus, method and other techniques to send a power operation initiation indication to the accelerator device via the subset of the plurality of interconnects, the power operation initiation indication to indicate a power operation to be performed on one or more infrastructure devices, receive a response the accelerator device, the response to indicate to the processor that the accelerator is ready for the power operation, and ucause the power operation to be performed on the accelerator device, the power operation to enable or disable power for the one or more of the infrastructure devices.
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公开(公告)号:US09817673B2
公开(公告)日:2017-11-14
申请号:US14636970
申请日:2015-03-03
Applicant: Intel Corporation
Inventor: Rajesh Poornachandran , Vincent J. Zimmer , Karunakara Kotary , Venkatesh Ramamurthy , Pralhad M. Madhavi
IPC: G06F9/00 , G06F15/177 , G06F9/44 , G06F1/32
CPC classification number: G06F9/4401 , G06F1/3203 , G06F1/3212 , G06F1/3287
Abstract: Technologies for fast low-power startup include a computing device with a processor having a power management integrated circuit. The computing device initializes platform components into a low-power state and determines, in a pre-boot firmware environment, the battery state of the computing device. The computing device determines a minimum-power startup (MPS) configuration that identifies platform components to be energized and determines whether the battery state is sufficient for the MPS configuration. If sufficient, the computing device energizes the platform components of the MPS configuration and boots into an MPS boot mode. In the MPS boot mode, the computing device may execute one or more user-configured application(s). If the battery state is sufficient for normal operation, the computing device may boot into a normal mode. In the normal mode, the user may configure the MPS configuration by selecting features for the future MPS boot mode. Other embodiments are described and claimed.
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公开(公告)号:US20170286334A1
公开(公告)日:2017-10-05
申请号:US15088429
申请日:2016-04-01
Applicant: Intel Corporation
Inventor: Gaurav Khanna , Prashant Sethi , Venkatesh Ramamurthy
CPC classification number: G06F13/24
Abstract: A method is described. The method includes determining that a first of a plurality of processor cores in a multi-processor computing system has entered an idle state, triggering a SMI for the first processor core, the first processor core entering a system management mode (SMM) and performing one or more platform management operations.
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公开(公告)号:US09292683B2
公开(公告)日:2016-03-22
申请号:US13977020
申请日:2013-03-15
Applicant: INTEL CORPORATION
Inventor: Gyan Prakash , Shahrokh Shahidzadeh , Venkatesh Ramamurthy , Hong Li , Mohan J. Kumar
IPC: G06F7/04 , G06F12/00 , G06F12/14 , G06F13/00 , G06F17/30 , G11C7/00 , G06F21/50 , G06F21/30 , G06F21/35 , G06F21/74 , H04L29/06
CPC classification number: G06F21/50 , G06F21/30 , G06F21/35 , G06F21/74 , G06F2221/2105 , H04L63/0492 , H04L63/08
Abstract: Techniques for providing security for a computing device are described herein. In one example, a maintenance issue for the computing device is detected. Additionally, a maintenance credential proximate the computing device can be detected. Furthermore, an alarm system within the computing device can be disabled in response to detecting an authorized maintenance credential.
Abstract translation: 本文描述了为计算设备提供安全性的技术。 在一个示例中,检测到用于计算设备的维护问题。 此外,可以检测靠近计算设备的维护凭证。 此外,响应于检测到授权的维护凭证,可以禁用计算设备内的报警系统。
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