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    Semiconductor device
    11.
    发明授权
    Semiconductor device 失效
    半导体器件

    公开(公告)号：US07635890B2

    公开(公告)日：2009-12-22

    申请号：US11783934

    申请日：2007-04-13

    申请人： Yoshio Ozawa ,  Akihito Yamamoto ,  Masayuki Tanaka ,  Katsuaki Natori ,  Katsuyuki Sekine ,  Daisuke Nishida ,  Ryota Fujitsuka

    发明人： Yoshio Ozawa ,  Akihito Yamamoto ,  Masayuki Tanaka ,  Katsuaki Natori ,  Katsuyuki Sekine ,  Daisuke Nishida ,  Ryota Fujitsuka

    IPC分类号： H01L29/76

    CPC分类号： H01L29/7883 ,  H01L27/115 ,  H01L27/11521 ,  H01L29/42324

    摘要： A semiconductor device includes a semiconductor substrate, a plurality of nonvolatile memory cells provided on the semiconductor substrate, each of the plurality of nonvolatile memory cells comprising a first insulating film provided on the semiconductor substrate, a charge storage layer provided on the first insulating film, a control gate electrode provided above the charge storage layer, a second insulating film provided between the control gate electrode and the charge storage layer, the second insulating film between adjacent charge storage layers including a first region having permittivity lower than that of the second insulating film on a top surface of the charge storage layer in a cross-section view of a channel width direction of the nonvolatile memory cell, and the first region having composition differing from that of the second insulating film on the top surface of the charge storage layer.

    摘要翻译： 半导体器件包括半导体衬底，设置在半导体衬底上的多个非易失性存储单元，所述多个非易失性存储单元中的每一个包括设置在所述半导体衬底上的第一绝缘膜，设置在所述第一绝缘膜上的电荷存储层， 设置在所述电荷存储层上方的控制栅电极，设置在所述控制栅电极和所述电荷存储层之间的第二绝缘膜，所述相邻电荷存储层之间的所述第二绝缘膜包括具有低于所述第二绝缘膜的介电常数的第一区域 在电荷存储层的顶表面上，以非易失性存储单元的沟道宽度方向的横截面视图，并且第一区域具有与电荷存储层的顶表面上的第二绝缘膜不同的组成。

    SEMICONDUCTOR DEVICE
    12.
    发明申请
    SEMICONDUCTOR DEVICE 失效
    半导体器件

    公开(公告)号：US20080197403A1

    公开(公告)日：2008-08-21

    申请号：US12026942

    申请日：2008-02-06

    申请人： Yoshio OZAWA ,  Akihito Yamamoto ,  Katsuaki Natori ,  Masayuki Tanaka ,  Katsuyuki Sekine ,  Daisuke Nishida ,  Ryota Fujitsuka

    发明人： Yoshio OZAWA ,  Akihito Yamamoto ,  Katsuaki Natori ,  Masayuki Tanaka ,  Katsuyuki Sekine ,  Daisuke Nishida ,  Ryota Fujitsuka

    IPC分类号： H01L27/115

    CPC分类号： H01L21/28273 ,  H01L27/115 ,  H01L27/11521 ,  H01L29/512 ,  H01L29/513 ,  H01L29/66825 ,  H01L29/7881

    摘要： A semiconductor device includes a semiconductor substrate, and nonvolatile memory cells, each of the cells including a channel region having a channel length and a channel width, a tunnel insulating film, a floating gate electrode, a control gate electrode, an inter-electrode insulating film between the floating and control gate electrodes, and an electrode side-wall insulating film on side-wall surfaces of the floating and control gate electrodes, the electrode side-wall insulating film including first and second insulating films having first and second dielectric constants, the first dielectric constant being higher than the second dielectric constant, the second dielectric constant being higher than a dielectric constant of a silicon nitride film, the first insulating film being in a central region of a facing region between the floating and control gate electrodes, the second insulating region being in the both end regions of the facing region and protruding from the both end portions.

    摘要翻译： 半导体器件包括半导体衬底和非易失性存储单元，每个单元包括具有沟道长度和沟道宽度的沟道区，隧道绝缘膜，浮栅电极，控制栅电极，电极间绝缘 在浮置控制栅电极和控制栅极电极的侧壁表面之间的电极侧壁绝缘膜，电极侧壁绝缘膜包括具有第一和第二介电常数的第一和第二绝缘膜， 所述第一介电常数高于所述第二介电常数，所述第二介电常数高于氮化硅膜的介电常数，所述第一绝缘膜位于所述浮动栅极和控制栅电极之间的面对区域的中心区域中， 第二绝缘区域位于面对区域的两端区域中并从两端口突出 ons。

    Semiconductor device and method of manufacturing the same
    16.
    发明授权
    Semiconductor device and method of manufacturing the same 失效
    半导体装置及其制造方法

    公开(公告)号：US07714373B2

    公开(公告)日：2010-05-11

    申请号：US11822437

    申请日：2007-07-05

    申请人： Katsuaki Natori ,  Masayuki Tanaka ,  Katsuyuki Sekine ,  Hirokazu Ishida ,  Masumi Matsuzaki ,  Yoshio Ozawa

    发明人： Katsuaki Natori ,  Masayuki Tanaka ,  Katsuyuki Sekine ,  Hirokazu Ishida ,  Masumi Matsuzaki ,  Yoshio Ozawa

    IPC分类号： H01L29/788

    CPC分类号： H01L27/115 ,  H01L27/11521

    摘要： There is disclosed a semiconductor device including a plurality of memory cell transistors, each memory cell transistor including a floating gate electrode isolated from each other via an isolation insulating film every memory cell transistor, an inter-electrode insulating film comprising a HfxAl1-xOy film (0.8≦x≦0.95) formed on the floating gate electrode, and a control gate electrode formed on the inter-electrode insulating film, wherein the memory cell transistors are arrayed to form a memory cell array.

    摘要翻译： 公开了一种包括多个存储单元晶体管的半导体器件，每个存储单元晶体管包括通过每个存储单元晶体管的隔离绝缘膜彼此隔离的浮栅，包括Hf x Al 1-x O y膜的电极间绝缘膜（ 形成在浮置栅电极上的栅极电极，以及形成在电极间绝缘膜上的控制栅电极，其中存储单元晶体管被排列以形成存储单元阵列。

    Semiconductor device
    18.
    发明授权
    Semiconductor device 失效
    半导体器件

    公开(公告)号：US07635891B2

    公开(公告)日：2009-12-22

    申请号：US11946606

    申请日：2007-11-28

    申请人： Katsuaki Natori ,  Katsuyuki Sekine ,  Daisuke Nishida ,  Ryota Fujitsuka ,  Masayuki Tanaka ,  Kazuaki Nakajima ,  Yoshio Ozawa ,  Akihito Yamamoto

    发明人： Katsuaki Natori ,  Katsuyuki Sekine ,  Daisuke Nishida ,  Ryota Fujitsuka ,  Masayuki Tanaka ,  Kazuaki Nakajima ,  Yoshio Ozawa ,  Akihito Yamamoto

    IPC分类号： H01L27/115

    CPC分类号： H01L27/11521 ,  H01L21/28273 ,  H01L27/115 ,  H01L29/513 ,  H01L29/7881

    摘要： A semiconductor device includes a semiconductor substrate, and a memory cell array provided on the semiconductor substrate and including a plurality of memory cells arranged on the semiconductor substrate, each of the plurality of the memory cells including a first insulating film provided on the semiconductor substrate, a charge storage layer provided on the first insulating film, a second insulating film provided on the charge storage layer, and a control electrode containing metal or metal silicide provided on the charge storage layer via the second insulating film, wherein a corner of a lower part of the control electrode includes semiconductor and fails to contain the metal or the metal silicide in a channel width direction view of the memory cell.

    摘要翻译： 半导体器件包括半导体衬底和设置在半导体衬底上并且包括布置在半导体衬底上的多个存储单元的存储单元阵列，多个存储单元中的每一个包括设置在半导体衬底上的第一绝缘膜， 设置在所述第一绝缘膜上的电荷存储层，设置在所述电荷存储层上的第二绝缘膜，以及经由所述第二绝缘膜设置在所述电荷存储层上的含有金属或金属硅化物的控制电极， 的控制电极包括半导体，并且在存储单元的沟道宽度方向视图中不能容纳金属或金属硅化物。

    SEMICONDUCTOR MEMORY DEVICE AND METHOD OF MANUFACTURING THE SAME
    19.
    发明申请
    SEMICONDUCTOR MEMORY DEVICE AND METHOD OF MANUFACTURING THE SAME 审中-公开
    半导体存储器件及其制造方法

    公开(公告)号：US20090001448A1

    公开(公告)日：2009-01-01

    申请号：US12118328

    申请日：2008-05-09

    申请人： Katsuyuki Sekine ,  Masayuki Tanaka ,  Katsuaki Natori ,  Daisuke Nishida ,  Ryota Fujitsuka ,  Yoshio Ozawa ,  Akihito Yamamoto

    发明人： Katsuyuki Sekine ,  Masayuki Tanaka ,  Katsuaki Natori ,  Daisuke Nishida ,  Ryota Fujitsuka ,  Yoshio Ozawa ,  Akihito Yamamoto

    IPC分类号： H01L29/00 ,  H01L21/3205

    CPC分类号： H01L21/3105 ,  H01L21/02126 ,  H01L21/0228 ,  H01L21/02337 ,  H01L21/3141 ,  H01L21/31612 ,  H01L27/115 ,  H01L27/11521 ,  H01L29/40114 ,  H01L29/42324

    摘要： A semiconductor memory device having a cell size of 60 nm or less includes a tunnel insulation film formed in a channel region of a silicon substrate containing a burying insulation film, a first conductive layer formed on the tunnel insulation film, an inter-electrode insulation film formed on the burying insulation film and the first conductive layer, a second conductive layer formed on the inter-electrode insulation film, a side wall insulation film formed on the side walls of the first conductive layer, the second conductive layer, and the inter-electrode insulation film, and an inter-layer insulation film formed on the side wall insulation film. The tunnel insulation film or the inter-electrode insulation film contains a high-dielectric insulation film. The side wall insulation film contains a predetermined concentration of carbon and nitrogen as well as chlorine having a concentration of 1×1019 atoms/cm3 or less.

    摘要翻译： 具有60nm以下的单元尺寸的半导体存储器件包括形成在包含掩埋绝缘膜的硅衬底的沟道区域中的隧道绝缘膜，形成在隧道绝缘膜上的第一导电层，电极间绝缘膜 形成在掩埋绝缘膜和第一导电层上的第二导电层，形成在电极间绝缘膜上的第二导电层，形成在第一导电层，第二导电层和第二导电层的侧壁上的侧壁绝缘膜， 电极绝缘膜和形成在侧壁绝缘膜上的层间绝缘膜。 隧道绝缘膜或电极间绝缘膜包含高介电绝缘膜。 侧壁绝缘膜含有预定浓度的碳氮，以及浓度为1×1019原子/ cm3以下的氯。

    Semiconductor device and method for manufacturing the same
    20.
    发明授权
    Semiconductor device and method for manufacturing the same 有权
    半导体装置及其制造方法

    公开(公告)号：US08110865B2

    公开(公告)日：2012-02-07

    申请号：US12888140

    申请日：2010-09-22

    申请人： Masayuki Tanaka ,  Daisuke Nishida ,  Ryota Fujitsuka ,  Katsuyuki Sekine ,  Akihito Yamamoto ,  Katsuaki Natori ,  Yoshio Ozawa

    发明人： Masayuki Tanaka ,  Daisuke Nishida ,  Ryota Fujitsuka ,  Katsuyuki Sekine ,  Akihito Yamamoto ,  Katsuaki Natori ,  Yoshio Ozawa

    IPC分类号： H01L29/788

    CPC分类号： H01L29/42324 ,  H01L27/115 ,  H01L27/11521 ,  H01L29/7883

    摘要： A semiconductor device includes a semiconductor substrate, a first insulating film formed on the semiconductor substrate, a charge storage layer formed on the first insulating film, a second insulating film formed on the charge storage layer, and a control electrode formed on the second insulating film, the second insulating film including a lower silicon nitride film, a lower silicon oxide film formed on the lower silicon nitride film, an intermediate insulating film formed on the lower silicon oxide film and containing a metal element, the intermediate insulating film having a relative dielectric constant of greater than 7, an upper silicon oxide film formed on the intermediate insulating film, and an upper silicon nitride film formed on the upper silicon oxide film.

    摘要翻译： 半导体器件包括半导体衬底，形成在半导体衬底上的第一绝缘膜，形成在第一绝缘膜上的电荷存储层，形成在电荷存储层上的第二绝缘膜，以及形成在第二绝缘膜上的控制电极 ，所述第二绝缘膜包括下氮化硅膜，形成在所述下氮化硅膜上的下氧化硅膜，形成在所述下氧化硅膜上并含有金属元素的中间绝缘膜，所述中间绝缘膜具有相对电介质 大于7的常数，形成在中间绝缘膜上的上部氧化硅膜和形成在上部氧化硅膜上的上部氮化硅膜。