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11.发明申请DIGITAL PRE-DISTORTION AND POST-DISTORTION BASED ON SEGMENTWISE PIECEWISE POLYNOMIAL APPROXIMATION 审中-公开基于分段多项式逼近的数字预失真和失败公开(公告)号：US20160034421A1
公开(公告)日：2016-02-04
申请号：US14449326
申请日：2014-08-01
Applicant: INFINEON TECHNOLOGIES AG
Inventor： Thomas Magesacher , Peter Singerl , Martin Mataln , Christian Schuberth
CPC classification number: G06F17/11 , G06F17/17 , G06F17/5009 , H03F1/3247 , H03F1/3258 , H03F2201/3233 , H04B10/2507 , H04B2210/252 , H04B2210/254 , H04L27/3427 , H04L27/368
Abstract: A nonlinear distorter is configured to mitigate nonlinearity from a nonlinear component of a nonlinear system. The nonlinear distorter operates to model the nonlinearity as a function of a piecewise polynomial approximation applied to segments of a nonlinear function of the nonlinearity. The nonlinear distorter generates a model output that decreases the nonlinearity of the nonlinear component.
Abstract translation: 非线性变阻器被配置为从非线性系统的非线性分量减轻非线性。 非线性变异器用于将非线性模型作为应用于非线性的非线性函数的分段的分段多项式近似的函数。 非线性损耗器产生一个减小非线性分量非线性的模型输出。
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公开(公告)号：US10003311B1
公开(公告)日：2018-06-19
申请号：US15386039
申请日：2016-12-21
Applicant: Infineon Technologies AG
Inventor： Timothy Canning , Richard Wilson , Haedong Jang , David Seebacher , Christian Schuberth , Rongguo Zhou , Bayaner Arigong
Abstract: An amplifier circuit includes an RF input port, an RF output port, a reference potential port, and an RF amplifier having an input terminal and a first output terminal. An output impedance matching network electrically couples the first output terminal to the RF output port. A first inductor is electrically connected in series between the first output terminal and the RF output port, a first LC resonator is directly electrically connected between the first output terminal and the reference potential port, and a second LC resonator is directly electrically connected between the first output terminal and the reference potential port. The first LC resonator is configured to compensate for an output capacitance of the RF amplifier at a center frequency of the RF signal. The second LC resonator is configured to compensate for a second order harmonic of the RF signal.
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13.发明申请Devices and Methods for Adaptive Crest Factor Reduction in Dynamic Predistortion 审中-公开动态预失真中自适应峰值因子降低的装置和方法公开(公告)号：US20160373072A1
公开(公告)日：2016-12-22
申请号：US15251266
申请日：2016-08-30
Applicant: Infineon Technologies AG
Inventor： Thomas Magesacher , Peter Singerl , Martin Mataln , Christian Schuberth
CPC classification number: H03F1/3247 , H03F1/3241 , H03F1/34 , H03F3/189 , H03F3/24 , H03F2200/451 , H04B1/0475 , H04B2001/0425 , H04B2001/0433
Abstract: A non-linear pre-distortion engine maintaining constant peak power at its output is disclosed. The engine includes a compression estimator, a crest factor reduction processor, a digital pre-distorter and a power amplifier. The compression estimator is configured to generate a compression estimate based on an input signal and a feedback signal. The feedback signal is based on an RF output signal. The crest factor reduction processor is configured to reduce a crest factor of the input signal to generate a crest factor reduced signal based on the compression estimate. The digital pre-distorter is configured to apply a pre-distortion to the crest factor reduced signal after an initial phase and generate a pre-distorted signal based on pre-distortion parameters. The power amplifier is configured to amplify the pre-distorted signal to generate the RF output signal. The operation of the chain consisting of pre-distorter and power amplifier is substantially linear and the pre-distorter maintains constant peak power at its output, which eliminates unwanted avalanche or pre-distorter blow-up issues.
Abstract translation: 公开了在其输出端保持恒定峰值功率的非线性预失真引擎。 引擎包括压缩估计器，波峰因数降低处理器，数字预失真器和功率放大器。 压缩估计器被配置为基于输入信号和反馈信号产生压缩估计。 反馈信号基于RF输出信号。 波峰因数降低处理器被配置为降低输入信号的波峰因数，以基于压缩估计产生波峰因数降低信号。 数字预失真器被配置为在初始相位之后对波峰因数降低信号施加预失真，并且基于预失真参数产生预失真信号。 功率放大器被配置为放大预失真信号以产生RF输出信号。 由预失真器和功率放大器组成的链条的操作基本上是线性的，并且预失真器在其输出端保持恒定的峰值功率，这消除了不必要的雪崩或预失真器爆炸问题。
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14.发明申请WIDEBAND DOHERTY AMPLIFIER CIRCUIT WITH INTEGRATED TRANSFORMER LINE BALUN 审中-公开宽带DOHERTY放大器电路与集成变压器线巴伦公开(公告)号：US20160308495A1
公开(公告)日：2016-10-20
申请号：US14689662
申请日：2015-04-17
Applicant: Infineon Technologies AG
Inventor： Tim Canning , Christian Schuberth , David Seebacher
CPC classification number: H03F1/0288 , H03F3/602 , H03F2200/09 , H03F2200/451
Abstract: A Doherty amplifier circuit includes an RF input terminal, an RF output terminal, a main amplifier having a first input terminal and a first output driving terminal, and a peaking amplifier having a second input terminal and a second output driving terminal. An output combining network is configured to feed output current from the first and second output driving terminals into a summing node. The output combining network includes a transmission line transformer balun having first and second input ports and a first output port being connected to the summing node, a first electrical connection between the first output driving terminal and the first input port, and a second electrical connection between the second output driving terminal and the second input port. The second electrical connection includes a quarter wave impedance inverter. A first output impedance matching network is connected between the summing node and the RF output terminal.
Abstract translation: Doherty放大器电路包括RF输入端子，RF输出端子，具有第一输入端子和第一输出驱动端子的主放大器，以及具有第二输入端子和第二输出驱动端子的峰值放大器。 输出组合网络被配置为将来自第一和第二输出驱动终端的输出电流馈送到求和节点。 输出组合网络包括具有第一和第二输入端口的传输线变压器平衡 - 不平衡转换器和连接到求和节点的第一输出端口，第一输出驱动端子和第一输入端口之间的第一电连接， 第二输出驱动端子和第二输入端口。 第二电连接包括四分之一波阻抗逆变器。 第一输出阻抗匹配网络连接在求和节点和RF输出终端之间。
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公开(公告)号：US09099996B2
公开(公告)日：2015-08-04
申请号：US14079923
申请日：2013-11-14
Applicant: Infineon Technologies AG
Inventor： David Seebacher , Peter Singerl , Christian Schuberth , Martin Mataln
IPC: H03K7/08
CPC classification number: H03K7/08
Abstract: A method for providing cross point information includes: providing an input signal having amplitude and phase information; interpolating between a first point of the input signal and a second point of the input signal to provide cross point information between the first point and the second point; and providing a pulse-width modulated signal based on the input signal and the cross point information.
Abstract translation: 提供交叉点信息的方法包括：提供具有振幅和相位信息的输入信号; 在所述输入信号的第一点和所述输入信号的第二点之间进行内插以在所述第一点和所述第二点之间提供交叉点信息; 以及基于输入信号和交叉点信息提供脉冲宽度调制信号。
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Patent Agency Ranking
公开(公告)号：US10930990B2
公开(公告)日：2021-02-23
申请号：US16277398
申请日：2019-02-15
Applicant: Infineon Technologies AG
Inventor： David Seebacher , Andrea Del Chiaro , Christian Schuberth , Peter Singerl , Ji Zhao
Abstract: A device includes at least one electrically conductive structure and at least one stripline. The stripline includes stripline sections that are connected to one another in a series connection between a first terminal and a second terminal. A first subset of the stripline sections is arranged on a first side of the conductive structure and a second subset of the stripline sections is arranged on a second side of the conductive structure. The device also includes at least one conductive connection between the first subset of the stripline sections and the second subset of the stripline sections, wherein the at least one conductive connection is isolated from the at least one electrically conductive structure.
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公开(公告)号：US10778156B2
公开(公告)日：2020-09-15
申请号：US15627880
申请日：2017-06-20
Applicant: Infineon Technologies AG
Inventor： David Seebacher , Christian Schuberth , Peter Singerl , Ji Zhao
IPC: H03F3/68 , H03F1/56 , H01L23/00 , H01L23/66 , H01L25/07 , H01L29/20 , H01L29/778 , H01L29/78 , H03F1/02 , H03F3/195
Abstract: A circuit includes a first power transistor stage internally configured to function as a voltage-controlled current source, a second power transistor stage having an input impedance which varies as a function of input power and an interstage matching network coupling an output of the first power transistor stage to an input of the second power transistor stage. The interstage matching network is configured to provide impedance inversion between the input of the second power transistor stage and the output of the first power transistor stage. The impedance inversion provided by the interstage matching network transforms the first power transistor stage from functioning as a voltage-controlled current source to functioning as a voltage-controlled voltage source at the input of the second power transistor stage.
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公开(公告)号：US10741476B2
公开(公告)日：2020-08-11
申请号：US15490991
申请日：2017-04-19
Applicant: Infineon Technologies AG
Inventor： Christian Schuberth , David Seebacher
IPC: H01L29/00 , H01L23/48 , H01L49/02 , H01L23/367 , H01L23/522 , H01L23/36 , H01L23/66 , H01L23/498
Abstract: A passive electrical component includes a substrate. A first metallization layer is formed on the substrate. A first dielectric layer is formed on the first metallization layer The first dielectric layer has a lower thermal conductivity than the substrate. A second metallization layer is formed on the first dielectric layer. An electrically conductive via provides an electrical connection between a first section of the first metallization layer and a second section of the second metallization layer. A thermally conductive via provides a thermally conductive path between the second section and the substrate. The thermally conductive via provides an open circuit termination to the second section of the second metallization layer.
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公开(公告)号：US09866183B2
公开(公告)日：2018-01-09
申请号：US15251266
申请日：2016-08-30
Applicant: Infineon Technologies AG
Inventor： Thomas Magesacher , Peter Singerl , Martin Mataln , Christian Schuberth
CPC classification number: H03F1/3247 , H03F1/3241 , H03F1/34 , H03F3/189 , H03F3/24 , H03F2200/451 , H04B1/0475 , H04B2001/0425 , H04B2001/0433
Abstract: A non-linear pre-distortion engine maintaining constant peak power at its output is disclosed. The engine includes a compression estimator, a crest factor reduction processor, a digital pre-distorter and a power amplifier. The compression estimator is configured to generate a compression estimate based on an input signal and a feedback signal. The feedback signal is based on an RF output signal. The crest factor reduction processor is configured to reduce a crest factor of the input signal to generate a crest factor reduced signal based on the compression estimate. The digital pre-distorter is configured to apply a pre-distortion to the crest factor reduced signal after an initial phase and generate a pre-distorted signal based on pre-distortion parameters. The power amplifier is configured to amplify the pre-distorted signal to generate the RF output signal. The operation of the chain consisting of pre-distorter and power amplifier is substantially linear and the pre-distorter maintains constant peak power at its output, which eliminates unwanted avalanche or pre-distorter blow-up issues.
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20.发明申请DEVICES AND METHODS FOR ADAPTIVE CREST FACTOR REDUCTION IN DYNAMIC PREDISTORTION 有权动态预测中自适应检测因子减少的装置和方法公开(公告)号：US20160365880A1
公开(公告)日：2016-12-15
申请号：US14736957
申请日：2015-06-11
Applicant: Infineon Technologies AG
Inventor： Thomas Magesacher , Peter Singerl , Martin Mataln , Christian Schuberth
IPC: H04B1/04
CPC classification number: H03F1/3247 , H03F1/3241 , H03F1/34 , H03F3/189 , H03F3/24 , H03F2200/451 , H04B1/0475 , H04B2001/0425 , H04B2001/0433
Abstract: A non-linear pre-distortion engine maintaining constant peak power at its output is disclosed. The engine includes a compression estimator, a crest factor reduction processor, a digital pre-distorter and a power amplifier. The compression estimator is configured to generate a compression estimate based on an input signal and a feedback signal. The feedback signal is based on an RF output signal. The crest factor reduction processor is configured to reduce a crest factor of the input signal to generate a crest factor reduced signal based on the compression estimate. The digital pre-distorter is configured to apply a pre-distortion to the crest factor reduced signal after an initial phase and generate a pre-distorted signal based on pre-distortion parameters. The power amplifier is configured to amplify the pre-distorted signal to generate the RF output signal. The operation of the chain consisting of pre-distorter and power amplifier is substantially linear and the pre-distorter maintains constant peak power at its output, which eliminates unwanted avalanche or pre-distorter blow-up issues.
Abstract translation: 公开了在其输出端保持恒定峰值功率的非线性预失真引擎。 引擎包括压缩估计器，波峰因数降低处理器，数字预失真器和功率放大器。 压缩估计器被配置为基于输入信号和反馈信号产生压缩估计。 反馈信号基于RF输出信号。 波峰因数降低处理器被配置为降低输入信号的波峰因数，以基于压缩估计产生波峰因数降低信号。 数字预失真器被配置为在初始相位之后对波峰因数降低信号施加预失真，并且基于预失真参数产生预失真信号。 功率放大器被配置为放大预失真信号以产生RF输出信号。 由预失真器和功率放大器组成的链条的操作基本上是线性的，并且预失真器在其输出端保持恒定的峰值功率，这消除了不必要的雪崩或预失真器爆炸问题。
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