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    METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE
    11.
    发明申请
    METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE 审中-公开
    制造半导体器件的方法

    公开(公告)号：US20120122294A1

    公开(公告)日：2012-05-17

    申请号：US13326499

    申请日：2011-12-15

    申请人： Isao Kamioka ,  Junichi Shiozawa ,  Ryu Kato ,  Yoshio Ozawa

    发明人： Isao Kamioka ,  Junichi Shiozawa ,  Ryu Kato ,  Yoshio Ozawa

    IPC分类号： H01L21/762 ,  H01L21/28

    CPC分类号： H01L29/7881 ,  H01L21/76208 ,  H01L27/11521 ,  H01L29/66825

    摘要： In one embodiment, a method of manufacturing a semiconductor device includes successively forming first and second films to be processed on a semiconductor substrate. The method further includes removing a predetermined region of the second film by etching, to form a slit part including sidewall parts and a bottom part, the sidewall parts including side surfaces of the second film, and the bottom part including an upper surface of the first film. The method further includes supplying oxidizing ions or nitriding ions contained in plasma, generated by a microwave, a radio-frequency wave, or electron cyclotron resonance, to the sidewall parts and the bottom part of the slit part by applying a predetermined voltage to the semiconductor substrate, thereby performing anisotropic oxidation or anisotropic nitridation of the sidewall parts and the bottom part of the slit part.

    摘要翻译： 在一个实施例中，制造半导体器件的方法包括在半导体衬底上依次形成待处理的第一和第二膜。 该方法还包括通过蚀刻去除第二膜的预定区域，以形成包括侧壁部分和底部的狭缝部分，所述侧壁部分包括第二膜的侧表面，并且底部包括第一膜的上表面 电影。 该方法还包括通过向半导体施加预定电压将由微波，射频波或电子回旋共振产生的等离子体中包含的氧化离子或氮化离子供应到狭缝部分的侧壁部分和底部。 从而进行侧壁部和狭缝部的底部的各向异性氧化或各向异性氮化。

    Nonvolatile semiconductor memory device and method for manufacturing the same
    12.
    发明授权
    Nonvolatile semiconductor memory device and method for manufacturing the same 有权
    非易失性半导体存储器件及其制造方法

    公开(公告)号：US08115249B2

    公开(公告)日：2012-02-14

    申请号：US12563651

    申请日：2009-09-21

    申请人： Isao Kamioka ,  Yoshio Ozawa ,  Katsuyuki Sekine

    发明人： Isao Kamioka ,  Yoshio Ozawa ,  Katsuyuki Sekine

    IPC分类号： H01L29/88

    CPC分类号： H01L29/792 ,  H01L27/11568 ,  H01L29/0657 ,  H01L29/4234 ,  H01L29/7926

    摘要： In a nonvolatile semiconductor memory device, a tunnel insulating layer, a charge storage layer and a charge block layer are formed on a silicon substrate in this order, and a plurality of control gate electrodes are provided above the charge block layer. Moreover, a cap layer made of silicon nitride is formed between the charge block layer and each of the control gate electrode, the cap layer being divided for each gate control electrode.

    摘要翻译： 在非易失性半导体存储器件中，在硅衬底上依次形成隧道绝缘层，电荷存储层和电荷阻挡层，并且在电荷阻挡层上方设置多个控制栅电极。 此外，在电荷阻挡层和控制栅极电极之间形成由氮化硅制成的覆盖层，对于每个栅极控制电极分隔盖层。

    Semiconductor device and method of fabricating the same
    14.
    发明申请
    Semiconductor device and method of fabricating the same 审中-公开
    半导体装置及其制造方法

    公开(公告)号：US20060202259A1

    公开(公告)日：2006-09-14

    申请号：US11133235

    申请日：2005-05-20

    申请人： Yoshio Ozawa ,  Isao Kamioka

    发明人： Yoshio Ozawa ,  Isao Kamioka

    IPC分类号： H01L29/772 ,  H01L21/336

    CPC分类号： H01L29/6656 ,  H01L27/115 ,  H01L27/11521 ,  H01L29/40114 ,  H01L29/42324 ,  H01L29/665 ,  H01L29/6653 ,  H01L29/66575 ,  H01L29/66825 ,  H01L29/78

    摘要： A semiconductor device includes a semiconductor substrate, a gate insulating film formed on the semiconductor substrate, a gate electrode formed on the gate insulating film, a source/drain diffusion layer formed in the semiconductor substrate at both sides of the gate electrode, and a channel region formed in the semiconductor substrate between a source and a drain of the source/drain diffusion layer and arranged below the gate insulating film, wherein an upper surface of the source/drain diffusion layer is positioned below a bottom surface of the gate electrode, and an upper surface of the channel region is positioned below the upper surface of the source/drain diffusion layer.

    摘要翻译： 半导体器件包括半导体衬底，形成在半导体衬底上的栅极绝缘膜，形成在栅极绝缘膜上的栅极电极，形成在栅电极两侧的半导体衬底中的源极/漏极扩散层，以及沟道 在所述源极/漏极扩散层的源极和漏极之间形成并布置在所述栅极绝缘膜的下方的所述半导体衬底中的所述源极/漏极扩散层的上表面位于所述栅电极的底表面的下方，以及 沟道区的上表面位于源/漏扩散层的上表面的下方。

    Semiconductor memory device and method of manufacturing the same
    18.
    发明申请
    Semiconductor memory device and method of manufacturing the same 审中-公开
    半导体存储器件及其制造方法

    公开(公告)号：US20060240619A1

    公开(公告)日：2006-10-26

    申请号：US11190120

    申请日：2005-07-27

    申请人： Yoshio Ozawa ,  Isao Kamioka ,  Junichi Shiozawa

    发明人： Yoshio Ozawa ,  Isao Kamioka ,  Junichi Shiozawa

    IPC分类号： H01L21/336

    CPC分类号： H01L27/115 ,  H01L27/11521

    摘要： A semiconductor memory device manufacturing method includes forming a floating gate electrode above a semiconductor substrate, forming an interelectrode insulating film above the floating gate electrode, forming a first radical nitride film on a surface of the interelectrode insulating film by first radical nitriding, and forming a control gate electrode on the first radical nitride film.

    摘要翻译： 一种半导体存储器件制造方法，包括在半导体衬底上形成浮置栅电极，在浮置栅电极上形成电极间绝缘膜，通过第一自由基氮化在电极间绝缘膜的表面上形成第一自由基氮化物膜， 第一自由基氮化物膜上的控制栅电极。

    Semiconductor device and method of fabricating the same
    19.
    发明申请
    Semiconductor device and method of fabricating the same 失效
    半导体装置及其制造方法

    公开(公告)号：US20060166428A1

    公开(公告)日：2006-07-27

    申请号：US11130128

    申请日：2005-05-17

    申请人： Isao Kamioka ,  Yoshio Ozawa

    发明人： Isao Kamioka ,  Yoshio Ozawa

    IPC分类号： H01L21/8238 ,  H01L21/336

    CPC分类号： H01L21/28273 ,  H01L21/3247 ,  H01L27/115 ,  H01L27/11521 ,  H01L27/11524

    摘要： According to the present invention, there is provided a semiconductor device fabrication method comprising: forming a first insulating film on a semiconductor substrate; forming a first conductive layer on the first insulating film; forming a second insulating film on the first conductive layer in a first processing chamber isolated from an outside; performing a modification process on the second insulating film in the first processing chamber, and unloading the semiconductor substrate from the first processing chamber to the outside; annealing the second insulating film in a second processing chamber; and forming a second conductive layer on the second insulating film.

    摘要翻译： 根据本发明，提供一种半导体器件制造方法，包括：在半导体衬底上形成第一绝缘膜; 在所述第一绝缘膜上形成第一导电层; 在与外部隔离的第一处理室中在所述第一导电层上形成第二绝缘膜; 对第一处理室中的第二绝缘膜执行修改处理，并将半导体衬底从第一处理室卸载到外部; 在第二处理室中退火第二绝缘膜; 以及在所述第二绝缘膜上形成第二导电层。

    Method of fabricating a semiconductor device with a non-uniform gate insulating film
    20.
    发明授权
    Method of fabricating a semiconductor device with a non-uniform gate insulating film 失效
    制造具有不均匀栅极绝缘膜的半导体器件的方法

    公开(公告)号：US08026133B2

    公开(公告)日：2011-09-27

    申请号：US12457892

    申请日：2009-06-24

    申请人： Yoshio Ozawa ,  Isao Kamioka

    发明人： Yoshio Ozawa ,  Isao Kamioka

    IPC分类号： H01L29/78 ,  H01L29/772

    CPC分类号： H01L29/6656 ,  H01L21/28273 ,  H01L27/115 ,  H01L27/11521 ,  H01L29/42324 ,  H01L29/665 ,  H01L29/6653 ,  H01L29/66575 ,  H01L29/66825 ,  H01L29/78

    摘要： A semiconductor device includes a semiconductor substrate, a gate insulating film formed on the semiconductor substrate, a gate electrode formed on the gate insulating film, a source/drain diffusion layer formed in the semiconductor substrate at both sides of the gate electrode, and a channel region formed in the semiconductor substrate between a source and a drain of the source/drain diffusion layer and arranged below the gate insulating film, wherein an upper surface of the source/drain diffusion layer is positioned below a bottom surface of the gate electrode, and an upper surface of the channel region is positioned below the upper surface of the source/drain diffusion layer.

    摘要翻译： 半导体器件包括半导体衬底，形成在半导体衬底上的栅极绝缘膜，形成在栅极绝缘膜上的栅极电极，形成在栅电极两侧的半导体衬底中的源极/漏极扩散层，以及沟道 在所述源极/漏极扩散层的源极和漏极之间形成并布置在所述栅极绝缘膜的下方的所述半导体衬底中的所述源极/漏极扩散层的上表面位于所述栅电极的底表面的下方，以及 沟道区的上表面位于源/漏扩散层的上表面的下方。