STRUCTURE FOR PIXEL SENSOR CELL THAT COLLECTS ELECTRONS AND HOLES
    11.
    发明申请
    STRUCTURE FOR PIXEL SENSOR CELL THAT COLLECTS ELECTRONS AND HOLES 失效
    用于收集电子和孔的像素传感器单元的结构

    公开(公告)号:US20070296006A1

    公开(公告)日:2007-12-27

    申请号:US11850776

    申请日:2007-09-06

    IPC分类号: H01L31/00

    摘要: The present invention relates to a design structure for a pixel sensor cell. The pixel sensor cell approximately doubles the available signal for a given quanta of light. A design structure for a pixel sensor cell having reduced complexity includes an n-type collection well region formed beneath a surface of a substrate for collecting electrons generated by electromagnetic radiation impinging on the pixel sensor cell and a p-type collection well region formed beneath the surface of the substrate for collecting holes generated by the impinging photons. A circuit structure having a first input is coupled to the n-type collection well region and a second input is coupled to the p-type collection well region, wherein an output signal of the pixel sensor cell is the magnitude of the difference of a signal of the first input and a signal of the second input.

    摘要翻译: 本发明涉及一种像素传感器单元的设计结构。 像素传感器单元对于给定的光量大约使可用信号加倍。 具有降低的复杂度的像素传感器单元的设计结构包括形成在基板的表面下面的n型收集阱区域,用于收集电子辐射产生的电子撞击在像素传感器单元上​​,以及p型收集阱区域 用于收集由撞击光子产生的孔的基板的表面。 具有第一输入的电路结构耦合到n型收集阱区域,而第二输入端耦合到p型收集阱区域,其中像素传感器单元的输出信号是信号的差值的大小 的第一输入和第二输入的信号。

    A CMOS IMAGER PHOTODIODE WITH ENHANCED CAPACITANCE
    12.
    发明申请
    A CMOS IMAGER PHOTODIODE WITH ENHANCED CAPACITANCE 失效
    具有增强电容的CMOS成像器光电二极管

    公开(公告)号:US20070187734A1

    公开(公告)日:2007-08-16

    申请号:US11276085

    申请日:2006-02-14

    IPC分类号: H01L31/062

    摘要: A pixel sensor cell having a semiconductor substrate having a surface; a photosensitive element formed in a substrate having a non-laterally disposed charge collection region entirely isolated from a physical boundary including the substrate surface. The photosensitive element comprises a trench having sidewalls formed in the substrate of a first conductivity type material; a first doped layer of a second conductivity type material formed adjacent to at least one of the sidewalls; and a second doped layer of the first conductivity type material formed between the first doped layer and the at least one trench sidewall and formed at a surface of the substrate, the second doped layer isolating the first doped layer from the at least one trench sidewall and the substrate surface. In a further embodiment, an additional photosensitive element is provided that includes a laterally disposed charge collection region that contacts the non-laterally disposed charge collection region of the photosensitive element and underlies the doped layer formed at the substrate surface.

    摘要翻译: 一种像素传感器单元,具有具有表面的半导体衬底; 形成在具有与包括基板表面的物理边界完全隔离的非横向布置的电荷收集区域的基板中的感光元件。 感光元件包括具有形成在第一导电类型材料的衬底中的侧壁的沟槽; 与所述侧壁中的至少一个相邻形成的第二导电类型材料的第一掺杂层; 以及形成在所述第一掺杂层和所述至少一个沟槽侧壁之间且形成在所述衬底的表面处的所述第一导电类型材料的第二掺杂层,所述第二掺杂层将所述第一掺杂层与所述至少一个沟槽侧壁隔离, 基材表面。 在另一个实施例中,提供附加的光敏元件,其包括横向设置的电荷收集区域,其接触感光元件的非横向设置的电荷收集区域,并且位于形成在基底表面处的掺杂层的下方。

    A CMOS IMAGER PHOTODIODE WITH ENHANCED CAPACITANCE

    公开(公告)号:US20060102939A1

    公开(公告)日:2006-05-18

    申请号:US11276085

    申请日:2006-02-14

    IPC分类号: H01L31/062

    摘要: A pixel sensor cell having a semiconductor substrate having a surface; a photosensitive element formed in a substrate having a non-laterally disposed charge collection region entirely isolated from a physical boundary including the substrate surface. The photosensitive element comprises a trench having sidewalls formed in the substrate of a first conductivity type material; a first doped layer of a second conductivity type material formed adjacent to at least one of the sidewalls; and a second doped layer of the first conductivity type material formed between the first doped layer and the at least one trench sidewall and formed at a surface of the substrate, the second doped layer isolating the first doped layer from the at least one trench sidewall and the substrate surface. In a further embodiment, an additional photosensitive element is provided that includes a laterally disposed charge collection region that contacts the non-laterally disposed charge collection region of the photosensitive element and underlies the doped layer formed at the substrate surface.

    RECESSED GATE FOR A CMOS IMAGE SENSOR
    14.
    发明申请
    RECESSED GATE FOR A CMOS IMAGE SENSOR 有权
    CMOS图像传感器的接收门

    公开(公告)号:US20070184614A1

    公开(公告)日:2007-08-09

    申请号:US11735223

    申请日:2007-04-13

    IPC分类号: H01L21/336

    摘要: A novel CMOS image sensor cell structure and method of manufacture. The imaging sensor comprises a substrate having an upper surface, a gate comprising a dielectric layer formed on the substrate and a gate conductor formed on the gate dielectric layer, a collection well layer of a first conductivity type formed below a surface of the substrate adjacent a first side of the gate conductor, a pinning layer of a second conductivity type formed atop the collection well at the substrate surface, and a diffusion region of a first conductivity type formed adjacent a second side of the gate conductor, the gate conductor forming a channel region between the collection well layer and the diffusion region. A portion of the bottom of the gate conductor is recessed below the surface of the substrate. Preferably, a portion of the gate conductor is recessed at or below a bottom surface of the pinning layer to a depth such that the collection well intersects the channel region thereby eliminating any potential barrier interference caused by the pinning layer.

    摘要翻译: 一种新颖的CMOS图像传感器单元结构及其制造方法。 成像传感器包括具有上表面的基板,包括形成在基板上的电介质层的栅极和形成在栅极电介质层上的栅极导体,形成在基板表面附近的第一导电类型的集合阱层 栅极导体的第一侧,形成在基板表面上的集电阱顶部的第二导电类型的钉扎层,以及邻近栅极导体的第二侧形成的第一导电类型的扩散区域,栅极导体形成沟道 收集阱层和扩散区域之间的区域。 栅极导体的底部的一部分在衬底的表面下方凹进。 优选地,栅极导体的一部分在钉扎层的底表面处或下方凹陷到深度,使得收集阱与沟道区相交,从而消除由钉扎层引起的任何潜在的屏障干扰。

    RECESSED GATE FOR AN IMAGE SENSOR
    15.
    发明申请
    RECESSED GATE FOR AN IMAGE SENSOR 有权
    图像传感器的门

    公开(公告)号:US20060124976A1

    公开(公告)日:2006-06-15

    申请号:US10905097

    申请日:2004-12-15

    摘要: A novel image sensor cell structure and method of manufacture. The imaging sensor comprises a substrate, a gate comprising a dielectric layer and gate conductor formed on the dielectric layer, a collection well layer of a first conductivity type formed below a surface of the substrate adjacent a first side of the gate conductor, a pinning layer of a second conductivity type formed atop the collection well at the substrate surface, and a diffusion region of a first conductivity type formed adjacent a second side of the gate conductor, the gate conductor forming a channel region between the collection well layer and the diffusion region. Part of the gate conductor bottom is recessed below the surface of the substrate. Preferably, a portion of the gate conductor is recessed at or below a bottom surface of the pinning layer to a depth such that the collection well intersects the channel region.

    摘要翻译: 一种新颖的图像传感器单元结构及其制造方法。 成像传感器包括基板,包括电介质层和形成在电介质层上的栅极导体的栅极,形成在与栅极导体的第一侧相邻的基板的表面下面的第一导电类型的收集阱层,钉扎层 在基板表面上形成在集合阱顶部的第二导电类型的第一导电类型的扩散区和在栅极导体的第二侧附近形成的第一导电类型的扩散区,栅极导体在集电阱层和扩散区之间形成沟道区 。 栅极导体底部的一部分凹陷在基板的表面下方。 优选地,栅极导体的一部分在钉扎层的底表面处或下方凹陷到使得收集阱与沟道区相交的深度。

    PIXEL SENSOR CELL FOR COLLECTING ELECTRONS AND HOLES
    16.
    发明申请
    PIXEL SENSOR CELL FOR COLLECTING ELECTRONS AND HOLES 失效
    用于收集电子和孔的像素传感器单元

    公开(公告)号:US20070029581A1

    公开(公告)日:2007-02-08

    申请号:US11161535

    申请日:2005-08-08

    IPC分类号: H01L27/148

    摘要: The present invention is a pixel sensor cell and method of making the same. The pixel sensor cell approximately doubles the available signal for a given quanta of light. The device of the present invention utilizes the holes produced by impinging photons in a pixel sensor cell circuit. A pixel sensor cell having reduced complexity includes an n-type collection well region formed beneath a surface of a substrate for collecting electrons generated by electromagnetic radiation impinging on the pixel sensor cell and a p-type collection well region formed beneath the surface of the substrate for collecting holes generated by the impinging photons. A circuit structure having a first input is coupled to the n-type collection well region and a second input is coupled to the p-type collection well region, wherein an output signal of the pixel sensor cell is the magnitude of the difference of a signal of the first input and a signal of the second input.

    摘要翻译: 本发明是像素传感器单元及其制造方法。 像素传感器单元对于给定的光量大约使可用信号加倍。 本发明的器件利用通过在像素传感器单元电路中照射光子而产生的空穴。 具有降低的复杂度的像素传感器单元包括形成在基板的表面下面的n型收集阱区域,用于收集由电子辐射照射在像素传感器单元上​​产生的电子以及形成在基板表面下方的p型收集阱区域 用于收集由撞击光子产生的孔。 具有第一输入的电路结构耦合到n型收集阱区域,而第二输入端耦合到p型收集阱区域,其中像素传感器单元的输出信号是信号的差值的大小 的第一输入和第二输入的信号。

    FUNNELED LIGHT PIPE FOR PIXEL SENSORS
    17.
    发明申请
    FUNNELED LIGHT PIPE FOR PIXEL SENSORS 有权
    用于像素传感器的FUNNELED LIGHT PIPE

    公开(公告)号:US20070138380A1

    公开(公告)日:2007-06-21

    申请号:US11275171

    申请日:2005-12-16

    IPC分类号: G01J1/04

    摘要: A photo sensing structure and methods for forming the same. The structure includes (a) a semiconductor substrate and (b) a photo collection region on the semiconductor substrate. The structure also includes a funneled light pipe on top of the photo collection region. The funneled light pipe includes (i) a bottom cylindrical portion on top of the photo collection region of the photo collection region, and (ii) a funneled portion which has a tapered shape and is on top and in direct physical contact with the bottom cylindrical portion. The structure further includes a color filter region on top of the funneled light pipe.

    摘要翻译: 感光结构及其形成方法。 该结构包括(a)半导体衬底和(b)半导体衬底上的光收集区域。 该结构还包括在照片收集区域顶部的漏斗光管。 漏斗式光管包括(i)照片收集区域的照片收集区域顶部的底部圆柱形部分,和(ii)具有锥形形状并且在顶部并与底部圆柱体直接物理接触的漏斗部分 一部分。 该结构还包括在漏斗的光管的顶部上的滤色器区域。

    INTEGRATED CIRCUIT PROTECTION FROM ESD DAMAGE DURING FABRICATION
    18.
    发明申请
    INTEGRATED CIRCUIT PROTECTION FROM ESD DAMAGE DURING FABRICATION 审中-公开
    集成电路在制造过程中受到ESD损害的保护

    公开(公告)号:US20070262305A1

    公开(公告)日:2007-11-15

    申请号:US11382492

    申请日:2006-05-10

    IPC分类号: H01L23/58

    摘要: A semiconductor integrated circuit wafer containing a plurality of integrated circuit chips and having a common substrate, each chip formed with an internal region in the interior of the chip and a removable external region on the perimeter of the internal region and circuitry disposed preferably in the external region and connected to at least one pad of an integrated circuit chip and the wafer substrate to establish electrical connection during electrostatic discharge and prevent ESD damage. The pad and substrate are isolated during tested of the integrated circuit chips in the wafer. Preferably, the external region is removed when the integrated circuit chips are diced from the wafer.

    摘要翻译: 一种包含多个集成电路芯片并具有公共基板的半导体集成电路晶片,每个芯片在芯片的内部形成有内部区域,并且在内部区域的周边上具有可移除的外部区域,优选地设置在外部 并且连接到集成电路芯片的至少一个焊盘和晶片衬底,以在静电放电期间建立电连接并防止ESD损坏。 在晶片中的集成电路芯片的测试期间隔离衬垫和衬底。 优选地,当从晶片切割集成电路芯片时,去除外部区域。

    LIGHT SHIELD FOR CMOS IMAGER
    19.
    发明申请
    LIGHT SHIELD FOR CMOS IMAGER 有权
    CMOS成像器的光栅

    公开(公告)号:US20070102738A1

    公开(公告)日:2007-05-10

    申请号:US11164072

    申请日:2005-11-09

    IPC分类号: H01L31/113 H01L31/062

    CPC分类号: H01L27/14623 H01L27/14685

    摘要: The present invention provides a light shield for shielding the floating diffusion of a complementary metal-oxide semiconductor (CMOS) imager. In accordance with an embodiment of the present invention, there is provided a pixel sensor cell including: a device region formed on a substrate; and a first layer of material forming a sidewall adjacent to a side of the device region for blocking electromagnetic radiation from the device region.

    摘要翻译: 本发明提供一种用于屏蔽互补金属氧化物半导体(CMOS)成像器的浮动扩散的遮光罩。 根据本发明的实施例,提供了一种像素传感器单元,包括:形成在基板上的器件区域; 以及形成与所述器件区域的一侧相邻的侧壁的第一材料层,用于阻挡来自所述器件区域的电磁辐射。

    A DAMASCENE COPPER WIRING IMAGE SENSOR
    20.
    发明申请
    A DAMASCENE COPPER WIRING IMAGE SENSOR 有权
    DAMASCENE铜接线图像传感器

    公开(公告)号:US20060113622A1

    公开(公告)日:2006-06-01

    申请号:US10904807

    申请日:2004-11-30

    IPC分类号: H01L31/00

    摘要: An image sensor array and method of fabrication wherein the sensor includes Copper (Cu) metallization levels allowing for incorporation of a thinner interlevel dielectric stack with improved thickness uniformity to result in a pixel array exhibiting increased light sensitivity. In the sensor array, each Cu metallization level includes a Cu metal wire structure formed at locations between each array pixel and, a barrier material layer is formed on top each Cu metal wire structure that traverses the pixel optical path. By implementing a single mask or self-aligned mask methodology, a single etch is conducted to completely remove the interlevel dielectric and barrier layers that traverse the optical path. The etched opening is then refilled with dielectric material. Prior to depositing the refill dielectric, a layer of either reflective or absorptive material is formed along the sidewalls of the etched opening to improve sensitivity of the pixels by either reflecting light to the underlying photodiode or by eliminating light reflections.

    摘要翻译: 一种图像传感器阵列和制造方法,其中传感器包括铜(Cu)金属化水平,允许结合更薄的层间电介质叠层,改进的厚度均匀性,以产生呈现增加的光敏度的像素阵列。 在传感器阵列中,每个Cu金属化层包括在每个阵列像素之间的位置处形成的Cu金属线结构,并且阻挡材料层形成在穿过像素光路的每个Cu金属线结构上。 通过实现单掩模或自对准掩模方法,进行单次蚀刻以完全去除穿过光路的层间电介质层和阻挡层。 然后将蚀刻的开口用电介质材料重新填充。 在沉积再充填电介质之前,沿蚀刻开口的侧壁形成反射或吸收材料层,以通过将光反射到下面的光电二极管或通过消除光反射来提高像素的灵敏度。