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公开(公告)号：US07732841B2
公开(公告)日：2010-06-08
申请号：US12172309
申请日：2008-07-14
申请人： James W. Adkisson , Andres Bryant , John J. Ellis-Monaghan , Mark D. Jaffe , Jeffrey B. Johnson , Alain Loiseau
发明人： James W. Adkisson , Andres Bryant , John J. Ellis-Monaghan , Mark D. Jaffe , Jeffrey B. Johnson , Alain Loiseau
IPC分类号： H01L27/148 , H01L31/062
CPC分类号： H01L27/14603 , H01L27/14609 , H01L27/14689 , H01L31/035281
摘要： The present invention is a pixel sensor cell and method of making the same. The pixel sensor cell approximately doubles the available signal for a given quanta of light. The device of the present invention utilizes the holes produced by impinging photons in a pixel sensor cell circuit. A pixel sensor cell having reduced complexity includes an n-type collection well region formed beneath a surface of a substrate for collecting electrons generated by electromagnetic radiation impinging on the pixel sensor cell and a p-type collection well region formed beneath the surface of the substrate for collecting holes generated by the impinging photons. A circuit structure having a first input is coupled to the n-type collection well region and a second input is coupled to the p-type collection well region, wherein an output signal of the pixel sensor cell is the magnitude of the difference of a signal of the first input and a signal of the second input.
摘要翻译： 本发明是像素传感器单元及其制造方法。 像素传感器单元对于给定的光量大约使可用信号加倍。 本发明的器件利用通过在像素传感器单元电路中照射光子而产生的空穴。 具有降低的复杂度的像素传感器单元包括形成在基板的表面下面的n型收集阱区域，用于收集由电子辐射照射在像素传感器单元上产生的电子以及形成在基板表面下方的p型收集阱区域 用于收集由撞击光子产生的孔。 具有第一输入的电路结构耦合到n型收集阱区域，而第二输入端耦合到p型收集阱区域，其中像素传感器单元的输出信号是信号的差值的大小 的第一输入和第二输入的信号。
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公开(公告)号：US07276748B2
公开(公告)日：2007-10-02
申请号：US10906625
申请日：2005-02-28
IPC分类号： H01L31/062 , H01L31/113
CPC分类号： H01L27/14643 , H01L27/14603 , H01L27/14609 , H01L27/14679
摘要： An imaging circuit, an imaging sensor, and a method of imaging. The imaging cell circuit including one or more imaging cell circuits, each imaging cell circuit comprising: a transistor having a floating body for holding charge generated in the floating body in response to exposure of the floating body to electromagnetic radiation; means for biasing the transistor wherein an output of the transistor is responsive to the electromagnetic radiation; and means for selectively connecting the floating body to a reset voltage supply.
摘要翻译： 成像电路，成像传感器和成像方法。 所述成像单元电路包括一个或多个成像单元电路，每个成像单元电路包括：晶体管，具有浮动体，用于响应于浮体暴露于电磁辐射而保持在浮体中产生的电荷; 用于偏置晶体管的装置，其中晶体管的输出响应于电磁辐射; 以及用于选择性地将浮动体连接到复位电压源的装置。
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公开(公告)号：US07538373B2
公开(公告)日：2009-05-26
申请号：US11765485
申请日：2007-06-20
IPC分类号： H01L31/062 , H01L31/113 , H01L29/00
CPC分类号： H01L27/14643 , H01L27/14603 , H01L27/14609 , H01L27/14679
摘要： An imaging circuit, an imaging sensor, and a method of imaging. The imaging cell circuit including one or more imaging cell circuits, each imaging cell circuit comprising: a transistor having a floating body for holding charge generated in the floating body in response to exposure of the floating body to electromagnetic radiation; means for biasing the transistor wherein an output of the transistor is responsive to the electromagnetic radiation; and means for selectively connecting the floating body to a reset voltage supply.
摘要翻译： 成像电路，成像传感器和成像方法。 所述成像单元电路包括一个或多个成像单元电路，每个成像单元电路包括：晶体管，具有浮动体，用于响应于浮体暴露于电磁辐射而保持在浮体中产生的电荷; 用于偏置晶体管的装置，其中晶体管的输出响应于电磁辐射; 以及用于选择性地将浮动体连接到复位电压源的装置。
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14.发明授权Pixel array, imaging sensor including the pixel array and digital camera including the imaging sensor 有权像素阵列，包括像素阵列的成像传感器和包括成像传感器的数码相机公开(公告)号：US07821553B2
公开(公告)日：2010-10-26
申请号：US11275417
申请日：2005-12-30
CPC分类号： H04N9/045
摘要： A pixel array in an image sensor, the image sensor and a digital camera including the image sensor. The image sensor includes a pixel array with colored pixels and unfiltered (color filter-free) pixels. Each unfiltered pixel occupies one or more array locations. The colored pixels may be arranged in uninterrupted rows and columns with unfiltered pixels disposed between the uninterrupted rows and columns. The image sensor may in CMOS with the unfiltered pixels reducing low-light noise and improving low-light sensitivity.
摘要翻译： 图像传感器中的像素阵列，图像传感器和包括图像传感器的数字照相机。 图像传感器包括具有彩色像素和未滤波（无滤色器）像素的像素阵列。 每个未过滤的像素占据一个或多个阵列位置。 彩色像素可以布置在不间断的行和列中，其中未过滤的像素布置在不间断的行和列之间。 图像传感器可以在CMOS中，未滤色像素降低低光噪声并改善低光灵敏度。
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公开(公告)号：US20070296006A1
公开(公告)日：2007-12-27
申请号：US11850776
申请日：2007-09-06
申请人： James Adkisson , Andres Bryant , John Ellis-Monaghan , Mark Jaffe , Jeffrey Johnson , Alain Loiseau
发明人： James Adkisson , Andres Bryant , John Ellis-Monaghan , Mark Jaffe , Jeffrey Johnson , Alain Loiseau
IPC分类号： H01L31/00
CPC分类号： H01L27/14603 , H01L27/14609 , H01L27/14689 , H01L31/035281 , H01L31/1037
摘要： The present invention relates to a design structure for a pixel sensor cell. The pixel sensor cell approximately doubles the available signal for a given quanta of light. A design structure for a pixel sensor cell having reduced complexity includes an n-type collection well region formed beneath a surface of a substrate for collecting electrons generated by electromagnetic radiation impinging on the pixel sensor cell and a p-type collection well region formed beneath the surface of the substrate for collecting holes generated by the impinging photons. A circuit structure having a first input is coupled to the n-type collection well region and a second input is coupled to the p-type collection well region, wherein an output signal of the pixel sensor cell is the magnitude of the difference of a signal of the first input and a signal of the second input.
摘要翻译： 本发明涉及一种像素传感器单元的设计结构。 像素传感器单元对于给定的光量大约使可用信号加倍。 具有降低的复杂度的像素传感器单元的设计结构包括形成在基板的表面下面的n型收集阱区域，用于收集电子辐射产生的电子撞击在像素传感器单元上，以及p型收集阱区域 用于收集由撞击光子产生的孔的基板的表面。 具有第一输入的电路结构耦合到n型收集阱区域，而第二输入端耦合到p型收集阱区域，其中像素传感器单元的输出信号是信号的差值的大小 的第一输入和第二输入的信号。
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16.发明授权Device and method for providing an integrated circuit with a unique identification 有权用于为集成电路提供独特识别的装置和方法公开(公告)号：US08028924B2
公开(公告)日：2011-10-04
申请号：US12560031
申请日：2009-09-15
CPC分类号： G06K19/067 , G06F21/73 , G06F2221/2129
摘要： A device and method for providing an integrated circuit with a unique identification. The device is usable on an integrated circuit (IC) for generating an identification (ID) identifying the IC and includes a plurality of identification cells each utilizing one of a four wire resistor, thin film resistors, and an inverter pair. A measurement circuit measures a parameter of each cell and is utilized in generating the ID in response thereto.
摘要翻译： 一种用于向集成电路提供唯一标识的装置和方法。 该装置可用于产生识别IC的识别（ID）的集成电路（IC），并且包括利用四线电阻器，薄膜电阻器和逆变器对之一的多个识别单元。 测量电路测量每个单元的参数，并且用于响应于此生成ID。
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公开(公告)号：US20070029581A1
公开(公告)日：2007-02-08
申请号：US11161535
申请日：2005-08-08
申请人： James Adkisson , Andres Bryant , John Ellis-Monaghan , Mark Jaffe , Jeffrey Johnson , Alain Loiseau
发明人： James Adkisson , Andres Bryant , John Ellis-Monaghan , Mark Jaffe , Jeffrey Johnson , Alain Loiseau
IPC分类号： H01L27/148
CPC分类号： H01L27/14603 , H01L27/14609 , H01L27/14689 , H01L31/035281
摘要： The present invention is a pixel sensor cell and method of making the same. The pixel sensor cell approximately doubles the available signal for a given quanta of light. The device of the present invention utilizes the holes produced by impinging photons in a pixel sensor cell circuit. A pixel sensor cell having reduced complexity includes an n-type collection well region formed beneath a surface of a substrate for collecting electrons generated by electromagnetic radiation impinging on the pixel sensor cell and a p-type collection well region formed beneath the surface of the substrate for collecting holes generated by the impinging photons. A circuit structure having a first input is coupled to the n-type collection well region and a second input is coupled to the p-type collection well region, wherein an output signal of the pixel sensor cell is the magnitude of the difference of a signal of the first input and a signal of the second input.
摘要翻译： 本发明是像素传感器单元及其制造方法。 像素传感器单元对于给定的光量大约使可用信号加倍。 本发明的器件利用通过在像素传感器单元电路中照射光子而产生的空穴。 具有降低的复杂度的像素传感器单元包括形成在基板的表面下面的n型收集阱区域，用于收集由电子辐射照射在像素传感器单元上产生的电子以及形成在基板表面下方的p型收集阱区域 用于收集由撞击光子产生的孔。 具有第一输入的电路结构耦合到n型收集阱区域，而第二输入端耦合到p型收集阱区域，其中像素传感器单元的输出信号是信号的差值的大小 的第一输入和第二输入的信号。
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公开(公告)号：US20130264608A1
公开(公告)日：2013-10-10
申请号：US13440514
申请日：2012-04-05
IPC分类号： H01L27/088 , H01L29/02 , H01L21/336
CPC分类号： H01L27/027 , H01L29/0692 , H01L29/456 , H01L29/7436 , H01L29/7824 , H01L29/7835
摘要： Device structures, design structures, and fabrication methods for a drain-extended metal-oxide-semiconductor (DEMOS) transistor. A first well of a first conductivity type and a second well of a second conductivity type are formed in a device region. The first and second wells are juxtaposed to define a p-n junction. A first doped region of the first conductivity type and a doped region of the second conductivity type are in the first well. The first doped region of the first conductivity type is separated from the second well by a first portion of the first well. The doped region of the second conductivity type is separated from the second well by a second portion of the first well. A second doped region of the first conductivity type, which is in the second well, is separated by a portion of the second well from the first and second portions of the first well.
摘要翻译： 漏极延伸金属氧化物半导体（DEMOS）晶体管的器件结构，设计结构和制造方法。 第一导电类型的第一阱和第二导电类型的第二阱形成在器件区域中。 第一和第二井并列以定义p-n结。 第一导电类型的第一掺杂区域和第二导电类型的掺杂区域位于第一阱中。 第一导电类型的第一掺杂区域与第一阱的第一部分与第二阱分离。 第二导电类型的掺杂区域与第一阱的第二部分与第二阱分离。 在第二阱中的第一导电类型的第二掺杂区域由第一阱的第一和第二部分的第二阱的一部分分开。
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19.发明授权Method for preparing a centella asiatica extract rich in madecassoside and in terminoloside 有权用于制备含有十七烷基苷和末端内酯的积雪草提取物的方法公开(公告)号：US08163706B2
公开(公告)日：2012-04-24
申请号：US12009696
申请日：2008-01-22
申请人： Alain Loiseau , Gérard Sene , Eric Theron
发明人： Alain Loiseau , Gérard Sene , Eric Theron
IPC分类号： A01N45/00
摘要： The invention concerns an extract of Centella asiatica comprising more than 75 wt. % of a mixture of madecassoside, terminoloside and asiaticoside, relative to the extract total weight, an extract of Centella asiatica comprising more than 95 wt. % of a mixture of madecassoside and terminoloside relative to the extract total weight and their use for regulating inflammatory mechanisms.
摘要翻译： 本发明涉及积雪草提取物，其包含超过75wt。 相对于提取物总重量的十五烷基苷，末端内切酶和积雪草苷的混合物的％，积雪草积聚物的提取物，其包含大于95wt。 相对于提取物总重量，十五烷醇和末端酯的混合物的百分比以及它们用于调节炎症机制的用途。
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公开(公告)号：US07948535B2
公开(公告)日：2011-05-24
申请号：US11948463
申请日：2007-11-30
CPC分类号： H04N5/37452 , H04N5/35527 , H04N5/3559
摘要： A pixel sensor cell of improved dynamic range and a design structure including the pixel sensor cell embodied in a machine readable medium are provided. The pixel cell comprises a coupling transistor that couples a capacitor device to a photosensing region (e.g., photodiode) of the pixel cell, the photodiode being coupled to a transfer gate and one terminal of the coupling transistor. In operation, the additional capacitance is coupled to the pixel cell photodiode when the voltage on the photodiode is drawn down to the substrate potential. Thus, the added capacitance is only connected to the imager cell when the cell is nearing its charge capacity. Otherwise, the cell has a low capacitance and low leakage. In an additional embodiment, a terminal of the capacitor is coupled to a “pulsed” supply voltage signal that enables substantially full depletion of stored charge from the capacitor to the photosensing region during a read out operation of the pixel sensor cell. In various embodiments, the locations of the added capacitance and photodiode may be interchanged with respect to the coupling transistor. In addition, the added capacitor of the pixel sensor cell allows for a global shutter operation.
摘要翻译： 提供了改进的动态范围的像素传感器单元和包括体现在机器可读介质中的像素传感器单元的设计结构。 像素单元包括将电容器器件耦合到像素单元的光敏区域（例如，光电二极管）的耦合晶体管，光电二极管耦合到传输栅极和耦合晶体管的一个端子。 在操作中，当光电二极管上的电压向下拉到衬底电位时，附加电容耦合到像素单元光电二极管。 因此，当电池接近其充电容量时，所添加的电容仅连接到成像器单元。 否则，电池具有低电容和低泄漏。 在另外的实施例中，电容器的端子耦合到“脉冲”电源电压信号，其在像素传感器单元的读出操作期间使存储的电荷从电容器到光敏区域基本上完全耗尽。 在各种实施例中，增加的电容和光电二极管的位置可以相对于耦合晶体管互换。 此外，像素传感器单元的附加电容允许全局快门操作。
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