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    Predicting and controlling critical dimension issues and pattern defectivity in wafers using interferometry
    11.
    发明授权
    Predicting and controlling critical dimension issues and pattern defectivity in wafers using interferometry 有权
    使用干涉测量预测和控制晶片中的关键尺寸问题和图案缺陷

    公开(公告)号：US09558545B2

    公开(公告)日：2017-01-31

    申请号：US14730997

    申请日：2015-06-04

    Applicant: KLA-Tencor Corporation

    Inventor： Pradeep Vukkadala ,  Sathish Veeraraghavan ,  Soham Dey ,  Jaydeep Sinha

    IPC: G06K9/00 ,  G06T7/00 ,  G06K9/62 ,  G06F17/50

    CPC classification number: G06T7/0004 ,  G06K9/6201 ,  G06T7/001 ,  G06T2207/10004 ,  G06T2207/30148 ,  H01L22/12 ,  H01L22/20

    Abstract: Systems and methods for predicting and controlling pattern quality data (e.g., critical dimension and/or pattern defectivity) in patterned wafers using patterned wafer geometry (PWG) measurements are disclosed. Correlations between PWG measurements and pattern quality data measurements may be established, and the established correlations may be utilized to provide pattern quality data predictions for a given wafer based on geometry measurements obtained for the give wafer. The predictions produced may be provided to a lithography tool, which may utilize the predictions to correct focus and/or title errors that may occur during the lithography process.

    Abstract translation: 公开了使用图案化晶片几何（PWG）测量在图案化晶片中预测和控制图案质量数据（例如临界尺寸和/或图案缺陷率）的系统和方法。 可以建立PWG测量和模式质量数据测量之间的相关性，并且可以利用所建立的相关性来基于为给定晶片获得的几何测量来为给定晶片提供图案质量数据预测。 可以将所产生的预测提供给光刻工具，光刻工具可以利用预测来校正可能在光刻工艺期间发生的焦点和/或标题误差。

    Systems, methods and metrics for wafer high order shape characterization and wafer classification using wafer dimensional geometry tool
    14.
    发明授权
    Systems, methods and metrics for wafer high order shape characterization and wafer classification using wafer dimensional geometry tool 有权
    使用晶圆尺寸几何工具的晶圆高阶形状表征和晶片分类的系统，方法和度量

    公开(公告)号：US09546862B2

    公开(公告)日：2017-01-17

    申请号：US13656143

    申请日：2012-10-19

    Applicant: KLA-Tencor Corporation

    Inventor： Haiguang Chen ,  Jaydeep Sinha ,  Sergey Kamensky ,  Sathish Veeraraghavan ,  Pradeep Vukkadala

    IPC: G01B11/24 ,  G06F17/00 ,  H01L21/66 ,  G01N21/95

    CPC classification number: G01B11/24 ,  G01B2210/56 ,  G01N21/9501 ,  G06F17/00 ,  H01L22/12

    Abstract: Systems and methods for improving results of wafer higher order shape (HOS) characterization and wafer classification are disclosed. The systems and methods in accordance with the present disclosure are based on localized shapes. A wafer map is partitioned into a plurality of measurement sites to improve the completeness of wafer shape representation. Various site based HOS metric values may be calculated for wafer characterization and/or classification purposes, and may also be utilized as control input for a downstream application. In addition, polar grid partitioning schemes are provided. Such polar grid partitioning schemes may be utilized to partition a wafer surface into measurement sites having uniform site areas while providing good wafer edge region coverage.

    Abstract translation: 公开了用于改善晶片高阶形状（HOS）表征和晶片分类的结果的系统和方法。 根据本公开的系统和方法基于局部形状。 将晶片图划分成多个测量点，以提高晶片形状表示的完整性。 可以针对晶片表征和/或分类目的计算各种基于站点的HOS度量值，并且还可以用作下游应用的控制输入。 此外，还提供了极坐标分割方案。 可以利用这种极性栅格划分方案将晶片表面划分成具有均匀位置区域的测量位置，同时提供良好的晶片边缘区域覆盖。

    System and Method to Emulate Finite Element Model Based Prediction of In-Plane Distortions Due to Semiconductor Wafer Chucking
    17.
    发明申请
    System and Method to Emulate Finite Element Model Based Prediction of In-Plane Distortions Due to Semiconductor Wafer Chucking 有权
    基于有限元模型的半导体晶片卡盘的平面失真预测的系统和方法

    公开(公告)号：US20140107998A1

    公开(公告)日：2014-04-17

    申请号：US13735737

    申请日：2013-01-07

    Applicant: KLA-Tencor Corporation

    Inventor： Pradeep Vukkadala ,  Sathish Veeraraghavan ,  Jaydeep Sinha ,  Haiguang Chen ,  Michael Kirk

    IPC: G06F17/50

    CPC classification number: G06F17/5018 ,  H01L21/67288

    Abstract: Systems and methods for prediction of in-plane distortions (IPD) due to wafer shape in semiconductor wafer chucking process is disclosed. A process to emulate the non-linear finite element (FE) contact mechanics model based IPD prediction is utilized in accordance with one embodiment of the present disclosure. The emulated FE model based prediction process is substantially more efficient and provides accuracy comparable to the FE model based IPD prediction that utilizes full-scale 3-D wafer and chuck geometry information and requires computation intensive simulations. Furthermore, an enhanced HOS IPD/OPD prediction process based on a series of Zernike basis wafer shape images is also disclosed.

    Abstract translation: 公开了用于预测半导体晶片夹持工艺中的晶片形状的面内失真（IPD）的系统和方法。 根据本公开的一个实施例，利用仿真基于IPD预测的非线性有限元（FE）接触力学模型的过程。 基于模拟的基于有限元模型的预测过程基本上更有效，并且提供了与使用全尺寸3-D晶片和卡盘几何信息的基于有限元模型的基于有限元模型的预测相当的精度，并且需要计算密集模拟。 此外，还公开了基于一系列Zernike基晶片形状图像的增强型HOS IPD / OPD预测处理。

    Overlay and semiconductor process control using a wafer geometry metric
    20.
    发明授权
    Overlay and semiconductor process control using a wafer geometry metric 有权

    公开(公告)号：US10249523B2

    公开(公告)日：2019-04-02

    申请号：US15135022

    申请日：2016-04-21

    Applicant: KLA-Tencor Corporation

    Inventor： Pradeep Vukkadala ,  Sathish Veeraraghavan ,  Jaydeep K. Sinha

    IPC: G01B9/02 ,  G03F7/20 ,  G01B11/16 ,  G01B11/24 ,  G01B11/27 ,  H01L21/66 ,  H01L21/67

    Abstract: The present invention may include acquiring a wafer shape value at a plurality of points of a wafer surface at a first and second process level, generating a wafer shape change value at each of the points, generating a set of slope of shape change values at each of the points, calculating a set of process tool correctables utilizing the generated set of slope of shape change values, generating a set of slope shape change residuals (SSCRs) by calculating a slope of shape change residual value at each of the points utilizing the set of process tool correctables, defining a plurality of metric analysis regions distributed across the surface, and then generating one or more residual slope shape change metrics for each metric analysis region based on one or more SSCRs within each metric analysis region.

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