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    Method for minimizing defects in a semiconductor substrate due to ion implantation
    11.
    发明授权
    Method for minimizing defects in a semiconductor substrate due to ion implantation 有权
    由于离子注入使半导体衬底中的缺陷最小化的方法

    公开(公告)号：US08858818B2

    公开(公告)日：2014-10-14

    申请号：US12895730

    申请日：2010-09-30

    申请人： Pushkar Ranade ,  Toshifumi Mori ,  Ken-ichi Okabe ,  Toshiki Miyake

    发明人： Pushkar Ranade ,  Toshifumi Mori ,  Ken-ichi Okabe ,  Toshiki Miyake

    IPC分类号： C23F1/00 ,  C03C15/00 ,  C03C25/68 ,  H01L21/302 ,  H01L21/461 ,  H01L21/265

    CPC分类号： H01L21/26513 ,  H01L21/26506

    摘要： The effects of knock-on oxide in a semiconductor substrate are reduced by providing a semiconductor substrate and forming a thin layer of native oxide on the semiconductor substrate. Ion implantation is performed through the native oxide layer. The native oxide layer reduces the phenomenon of knock-on oxide and oxygen concentration within the semiconductor substrate. Further reduction may be achieved by etching the surface of the semiconductor substrate in order to eliminate a concentration of oxygen at a surface of the semiconductor substrate.

    摘要翻译： 通过提供半导体衬底并在半导体衬底上形成天然氧化物的薄层来减少半导体衬底中的环氧化物的影响。 通过天然氧化物层进行离子注入。 天然氧化物层减少了半导体衬底内的氧化物和氧浓度的现象。 可以通过蚀刻半导体衬底的表面以消除半导体衬底的表面处的氧浓度来实现进一步的还原。

    METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE
    17.
    发明申请
    METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE 审中-公开
    制造半导体器件的方法

    公开(公告)号：US20120083087A1

    公开(公告)日：2012-04-05

    申请号：US13172465

    申请日：2011-06-29

    申请人： Taiji Ema ,  Toshifumi Mori ,  Toshiki Miyake ,  Kenichi Okabe

    发明人： Taiji Ema ,  Toshifumi Mori ,  Toshiki Miyake ,  Kenichi Okabe

    IPC分类号： H01L21/336

    CPC分类号： H01L21/2652 ,  H01L21/0274 ,  H01L21/30604 ,  H01L21/31111 ,  H01L21/823807 ,  H01L21/823892 ,  H01L29/66477

    摘要： A protection film is formed on a semiconductor substrate. Impurity ions are implanted into the semiconductor substrate through the protection film. The impurity is activated to form an impurity layer. The protection film is removed after forming the impurity layer. The semiconductor substrate of a surface portion of the impurity layer is removed after removing the protection film. A semiconductor layer is epitaxially grown above the semiconductor substrate after removing the semiconductor substrate of the surface portion of the impurity layer.

    摘要翻译： 在半导体基板上形成保护膜。 通过保护膜将杂质离子注入到半导体衬底中。 杂质被激活以形成杂质层。 在形成杂质层之后去除保护膜。 去除保护膜后去除杂质层的表面部分的半导体衬底。 在除去杂质层的表面部分的半导体衬底之后，在半导体衬底上方外延生长半导体层。

    Semiconductor device with elevated source/drain structure and its manufacture method
    19.
    发明授权
    Semiconductor device with elevated source/drain structure and its manufacture method 失效
    具有升高的源极/漏极结构的半导体器件及其制造方法

    公开(公告)号：US06855589B2

    公开(公告)日：2005-02-15

    申请号：US10648488

    申请日：2003-08-27

    申请人： Toshifumi Mori

    发明人： Toshifumi Mori

    IPC分类号： H01L21/28 ,  H01L21/336 ,  H01L29/78 ,  H01L21/8238

    CPC分类号： H01L29/6653 ,  H01L29/66492 ,  H01L29/665 ,  H01L29/6659 ,  H01L29/66628 ,  H01L29/7834

    摘要： A gate electrode is formed over a partial surface area of a semiconductor substrate, with a gate insulating film being interposed therebetween. A first semiconductor film is formed over the semiconductor substrate on both sides of the gate electrode, the first semiconductor film being spaced apart from the gate electrode. An impurity diffusion region is formed in each of the first semiconductor films. An extension region is formed in the surface layer of the semiconductor substrate on both sides of the gate electrode. The extension region is doped with impurities of the same conductivity type as the impurity diffusion region and being connected to a corresponding one of the impurity diffusion regions. Sidewall spacers are formed on the sidewalls of the gate electrode, the sidewall spacers extending beyond edges of the first semiconductor films on the gate electrode side and covering partial surfaces of the first semiconductor films.

    摘要翻译： 在半导体衬底的部分表面区域上形成栅电极，其间插入有栅极绝缘膜。 第一半导体膜形成在栅电极两侧的半导体衬底的上方，第一半导体膜与栅电极间隔开。 在每个第一半导体膜中形成杂质扩散区。 在栅极两侧的半导体衬底的表面层中形成延伸区域。 扩展区域掺杂与杂质扩散区域相同导电类型的杂质并连接到相应的一个杂质扩散区域。 侧壁间隔件形成在栅电极的侧壁上，侧壁间隔物延伸超过栅电极侧的第一半导体膜的边缘并且覆盖第一半导体膜的部分表面。