公开(公告)号：US5675771A

公开(公告)日：1997-10-07

申请号：US311649

申请日：1994-09-23

申请人： John L. Curley ,  Thomas S. Hirsch ,  James W. Stonier ,  Kin C. Yu

发明人： John L. Curley ,  Thomas S. Hirsch ,  James W. Stonier ,  Kin C. Yu

IPC分类号： G06F1/00 ,  G06F9/455 ,  G06F9/46 ,  G06F13/10 ,  G06F21/00 ,  G06F15/16

CPC分类号： G06F13/10 ,  G06F13/105 ,  G06F21/31 ,  G06F21/6281 ,  G06F9/45537 ,  G06F2221/2105

摘要： A host data processing system which includes a plurality of input/output devices operates under the control of an enhanced version of the UNIX operating system. The host system includes an emulator which runs as an application process for executing user emulated system (ES) application programs. The emulator includes a number of emulated system executive service components operating in shared memory and an interpreter, an emulator monitor call unit (EMCU) and a number of server facilities operating in the host memory. The ES executive service command handler component is extended to accommodate a number of dual decor commands which invoke host system facilities to execute terminal based commands either synchronously or asynchronously through the automatic creation of host shell mechanisms directly accessible by emulated system users. The server facilities include a network terminal driver (NTD) server for executing emulated system user terminal requests through host system drivers. Additionally, the NTD server includes mechanisms enabling a user to have direct terminal access to host facilities for executing procedures through such shell mechanisms. The mechanisms perform trusted user level validation when each dual decor command is issued and the shell mechanisms use the host access control mechanisms for checking access when the procedure is executed preventing both unauthorized user access and compromises in user data through the improper use of dual decor commands.

摘要翻译： 包括多个输入/输出设备的主机数据处理系统在UNIX操作系统的增强版本的控制下操作。 主机系统包括作为执行用户仿真系统（ES）应用程序的应用程序运行的仿真器。 仿真器包括在共享存储器中操作的多个模拟系统执行服务组件和解释器，仿真器监视器呼叫单元（EMCU）以及在主机存储器中操作的多个服务器设备。 ES执行服务命令处理程序组件被扩展以适应一些双重装饰命令，其通过自动创建由仿真系统用户直接访问的主机壳机制来同步或异步地调用主机系统设施来执行基于终端的命令。 服务器设备包括用于通过主机系统驱动程序执行仿真系统用户终端请求的网络终端驱动器（NTD）服务器。 此外，NTD服务器包括使得用户能够直接终端访问主机设施以执行通过这些机壳的过程的机制。 当执行每个双重装饰命令时，这些机制执行受信任的用户级别验证，并且当执行该过程时，shell机制使用主机访问控制机制来检查访问，以防止未经授权的用户访问并且通过不正确地使用双装饰命令来损害用户数据 。

公开(公告)号：US5483647A

公开(公告)日：1996-01-09

申请号：US992945

申请日：1992-12-17

申请人： Kin C. Yu ,  Charles T. Mighill ,  Teresa L. C. Wu ,  Christopher R. M. Bailey ,  Steven D. Lizotte

发明人： Kin C. Yu ,  Charles T. Mighill ,  Teresa L. C. Wu ,  Christopher R. M. Bailey ,  Steven D. Lizotte

IPC分类号： G06F9/455 ,  G06F9/48 ,  G06F3/00 ,  G06F3/02 ,  G06F13/00 ,  G06F13/14

CPC分类号： G06F9/4843 ,  G06F9/45537

摘要： A hybrid system environment includes a proprietary operating system and processing unit and a non-proprietary operating system (UNIX based) and processing unit. The systems tightly couple to a system bus in common with a main memory and a number of multiline communications controllers and communicate through a common area of main memory. The UNIX terminal connections to such controllers are virtual connections applied by a virtual terminal driver through the system proprietary communications software components. These components include a server, a network terminal driver (NTD) and a number of multiplexer driver modules. A multiplexer physical terminal driver is included in the UNIX-based operating system and a switching mechanism is incorporated into the virtual terminal driver for enabling switching to such physical terminal driver when a user switches via a switch command to the UNIX-based operating system. The server module upon being invoked upon such switching operates to establish a direct communications path between an application running under the UNIX-based operating system and the controller communications line paths through the multiplexer driver module and logically disconnects the virtual communications line path from the NTD module to the multiplexer driver module thereby improving system efficiency and terminal connectivity.

摘要翻译： 混合系统环境包括专有操作系统和处理单元以及非专有操作系统（基于UNIX）和处理单元。 系统与主存储器和多个通信控制器共同紧密地耦合到系统总线，并通过主存储器的公共区域进行通信。 与这种控制器的UNIX终端连接是由虚拟终端驱动程序通过系统专用通信软件组件应用的虚拟连接。 这些组件包括服务器，网络终端驱动器（NTD）和多个多路复用器驱动器模块。 在基于UNIX的操作系统中包括多路复用器物理终端驱动器，并且当用户通过切换命令切换到基于UNIX的操作系统时，将切换机制并入到虚拟终端驱动器中以使能切换到这种物理终端驱动器。 在这种切换时被调用的服务器模块操作以在通过基于UNIX的操作系统运行的应用程序和通过多路复用器驱动器模块的控制器通信线路径之间建立直接通信路径，并在逻辑上将虚拟通信线路路径与NTD模块 从而提高系统效率和终端连接性。

公开(公告)号：US4831518A

公开(公告)日：1989-05-16

申请号：US900649

申请日：1986-08-26

申请人： Kin C. Yu ,  Allen C. Hirtle

发明人： Kin C. Yu ,  Allen C. Hirtle

IPC分类号： G06F9/50 ,  G06F11/00 ,  G06F11/20 ,  H04L29/00

CPC分类号： G06F9/4812 ,  H04L29/00 ,  G06F11/20

摘要： A multiprocessor interrupt rerouting mechanism and method is disclosed for rerouting messages intended for a first processor to a second processor. In a fault tolerant computer system having several processors or LANs under the control of a single controller, when the controller completes a communication task requested by one of the processors, it will send an interrupt request to the requesting processor which then notifies the application process for which the communication task was performed, information regarding the status of the communication task. If for any reason the requesting processor being interrupted is inoperative or too busy to handle the interrupt request, the application process is then notified as to the status of the communication task by rerouting the interrupt request from the controller so that another processor can handle it.

摘要翻译： 公开了一种多处理器中断重路由机制和方法，用于将用于第一处理器的消息重新路由到第二处理器。 在具有在单个控制器的控制下的多个处理器或LAN的容错计算机系统中，当控制器完成由处理器之一请求的通信任务时，它将向请求处理器发送中断请求，该请求处理器然后通知应用程序处理 执行通信任务的信息，关于通信任务的状态的信息。 如果由于任何原因中断请求处理器不工作或太忙而无法处理中断请求，则通过从控制器重新路由中断请求来通知应用程序处理通信任务的状态，以便另一个处理器可以处理它。

公开(公告)号：US4586129A

公开(公告)日：1986-04-29

申请号：US510712

申请日：1983-07-05

申请人： Thomas L. Murray, Jr. ,  Kin C. Yu ,  Thomas O. Holtey

发明人： Thomas L. Murray, Jr. ,  Kin C. Yu ,  Thomas O. Holtey

IPC分类号： H04N7/173 ,  G01R31/28 ,  G06F11/00 ,  G09G3/00 ,  G09G5/00 ,  G06F3/153 ,  H04N5/04

CPC分类号： G09G3/006 ,  G01R31/2834 ,  G06F11/0757

摘要： A data processing system includes a cathode ray tube (CRT) display. Apparatus associated with the CRT tests and verifies the vertical and horizontal synchronization and the logic associated with a character generator. Refresh signals, horizontal synchronization signals and data bit signals from the character generator are counted. The counts of those signals which occur within a predetermined number of occurrences of vertical synchronization signals are verified.

摘要翻译： 数据处理系统包括阴极射线管（CRT）显示器。 与CRT测试相关联的设备，并验证垂直和水平同步以及与字符发生器相关联的逻辑。 对来自字符发生器的刷新信号，水平同步信号和数据位信号进行计数。 验证在预定数量的垂直同步信号中发生的那些信号的计数。

公开(公告)号：US4488231A

公开(公告)日：1984-12-11

申请号：US512701

申请日：1983-07-11

申请人： Kin C. Yu ,  Gary J. Goss

发明人： Kin C. Yu ,  Gary J. Goss

IPC分类号： G06F13/24 ,  G06F15/167 ,  G06F13/00

CPC分类号： G06F13/24 ,  G06F15/167

摘要： A data processing system includes a communication subsystem having an I/O microprocessor for communicating with a central processing unit and a main memory; and a line microprocessor for communicating with a number of devices. The I/O microprocessor and the line microprocessor communicate with each other through mailboxes stored in a shared memory. The line microprocessor interrupts the I/O microprocessor to process data bytes being transferred between main memory and a device requesting service when the line microprocessor has responded to the requesting device and loaded the mailbox.

摘要翻译： 数据处理系统包括具有用于与中央处理单元和主存储器进行通信的I / O微处理器的通信子系统; 以及用于与多个设备通信的线路微处理器。 I / O微处理器和线路微处理器通过存储在共享存储器中的邮箱相互通信。 线路微处理器中断I / O微处理器以处理在主存储器和请求服务的设备之间传输的数据字节，当线路微处理器响应请求设备并加载邮箱时。

公开(公告)号：US4426679A

公开(公告)日：1984-01-17

申请号：US192127

申请日：1980-09-29

申请人： Kin C. Yu ,  Gary J. Goss

发明人： Kin C. Yu ,  Gary J. Goss

IPC分类号： H04L29/04 ,  G06F13/00 ,  G06F13/12 ,  G06F13/40 ,  G06F13/42 ,  G06F3/00

CPC分类号： G06F13/4226 ,  G06F13/124 ,  G06F13/4022

摘要： A data processing system includes a central processing subsystem, a main memory subsystem, and a number of peripheral subsystems including a communication subsystem all coupled in common to a system bus. Subsystems communicate with each other during asynchronously generated information bus transfer cycles. Each one of the subsystems receives information by providing any one of three signal responses including a positive acknowledge signal indicating an immediate response, a negative acknowledge signal indicating that the unit will most likely be busy for an extended period of time, and a quasi-negative response indicating that the unit will probably be ready during the next asynchronously generated bus transfer cycle. In order to expediate the response in the case of the transfer over the system bus of an input/output order from the central processing subsystem to the communication subsystem, apparatus in the communication system stores a positive acknowledge or a negative acknowledge signal for each communication channel. The signal is set to indicate a negative acknowledge when the previous input/output order filled the last communication control block. The signal is set to indicate a positive acknowledge when the previous input/output order emptied the communication control block.

摘要翻译： 数据处理系统包括中央处理子系统，主存储器子系统以及包括通用子系统的多个外围子系统，所述通信子系统共同地连接到系统总线。 子系统在异步生成的信息总线传输周期期间相互通信。 每个子系统通过提供三个信号响应中的任何一个来接收信息，包括指示立即响应的肯定确认信号，指示该单元将很可能长时间延长的负确认信号，以及准负值 响应指示在下一个异步生成的总线传输周期期间该单元可能准备就绪。 为了在通过系统总线从中央处理子系统传送到通信子系统的情况下加速响应，通信系统中的装置存储每个通信信道的肯定确认信号或否定确认信号 。 当前一个输入/输出顺序填充最后一个通信控制块时，该信号被设置为指示一个否定确认。 当前一个输入/输出顺序清空通信控制块时，该信号被设置为指示肯定确认。

公开(公告)号：US4255786A

公开(公告)日：1981-03-10

申请号：US402

申请日：1979-01-02

申请人： Thomas O. Holtey ,  Kin C. Yu

发明人： Thomas O. Holtey ,  Kin C. Yu

IPC分类号： G06F9/48 ,  G06F13/26 ,  G06F9/22 ,  G06F9/32

CPC分类号： G06F9/4812 ,  G06F13/26

摘要： A multi-way vectored interrupt automatically addresses any one of a plurality of locations in a memory according to a unique function code. Hardware is provided which disables the normal paging addressing apparatus of a processor and enables an indirect addressing mechanism when a predetermined location in memory is addressed.

摘要翻译： 多路向量中断根据唯一的功能代码自动寻址存储器中的多个位置中的任何一个。 提供了硬件，其禁用处理器的正常寻呼寻址装置，并且当存储器中的预定位置被寻址时启用间接寻址机制。