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    Multi-host networking systems and methods
    12.
    发明授权
    Multi-host networking systems and methods 有权

    公开(公告)号：US11693812B2

    公开(公告)日：2023-07-04

    申请号：US17183552

    申请日：2021-02-24

    Applicant: MELLANOX TECHNOLOGIES, LTD.

    Inventor： Avraham Ganor

    IPC: G06F13/42 ,  G06F13/38 ,  G06F13/40

    CPC classification number: G06F13/4221 ,  G06F13/385 ,  G06F13/4063 ,  G06F2213/0024

    Abstract: Systems and method are provided. An illustrative system includes a first compute node having a first processing unit, a first compute node port, and a first peripheral component interconnect bus configured to carry data between the first processing unit and the first compute node port. The system may further include a multi-host network interface controller having a first multi-host port, where the first multi-host port is configured to connect with the first compute node port via a first peripheral component interconnect cable, a network port, where the network port is configured to receive a network interface of a networking cable, and processing circuitry configured to translate and carry data between the first multi-host port and the network port.

    Software-controlled clock synchronization of network devices
    13.
    发明授权
    Software-controlled clock synchronization of network devices 有权

    公开(公告)号：US11606427B2

    公开(公告)日：2023-03-14

    申请号：US17120313

    申请日：2020-12-14

    Applicant: MELLANOX TECHNOLOGIES, LTD.

    Inventor： Dotan David Levi ,  Avraham Ganor ,  Arnon Sattinger ,  Natan Manevich ,  Reuven Kogan ,  Artiom Tsur ,  Ariel Almog ,  Bar Shapira

    IPC: H04L67/1095 ,  G06F1/12 ,  G06F1/14

    Abstract: A synchronized communication system includes a plurality of network communication devices, one of which is designated as a root device and the others designated as slave devices. Each network communication device includes one or more ports and communications circuitry, which processes the communication signals received by the one or more ports so as to recover a respective remote clock from each of the signals. A synchronization circuit is integrated in the root device and provides a root clock signal, which is conveyed by clock links to the slave devices. A host processor selects one of the ports of one of the network communication devices to serve as a master port, finds a clock differential between the root clock signal and the respective remote clock recovered from the master port, and outputs, responsively to the clock differential, a control signal causing the synchronization circuit to adjust the root clock signal.

    Networking cards with increased performance
    16.
    发明授权
    Networking cards with increased performance 有权

    公开(公告)号：US11140780B2

    公开(公告)日：2021-10-05

    申请号：US16894956

    申请日：2020-06-08

    Applicant: Mellanox Technologies, Ltd.

    Inventor： Avraham Ganor ,  Ariel Naftali Cohen ,  Assad Khamaisee ,  Andrey Blyahman ,  Doron Fael ,  Sergey Savich

    IPC: H05K1/14 ,  H05K7/14

    Abstract: Apparatuses, systems, and associated methods of manufacturing are described that provide a networking card arrangement with increased thermal performance. An example arrangement includes a primary network card that defines a first card-to-board connection and a networking chipset supported by the primary network card. The arrangement also includes an auxiliary network card that defines a second card-to-board connection and networking cable connectors supported by the auxiliary network card that receive networking cables therein. The arrangement further includes a card connection element that operably connects the primary network card and the auxiliary network card. In an operational configuration in which the primary network card and the auxiliary network card are received by a server board via the first card-to-board connection and the second card-to-board connection, the primary network card is spaced from the auxiliary network card such that air may pass therebetween.

    NIC with Programmable Pipeline
    17.
    发明申请
    NIC with Programmable Pipeline 审中-公开

    公开(公告)号：US20190140979A1

    公开(公告)日：2019-05-09

    申请号：US16012826

    申请日：2018-06-20

    Applicant: MELLANOX TECHNOLOGIES, LTD.

    Inventor： Dotan Levi ,  Liran Liss ,  Haggai Eran ,  Noam Bloch ,  Idan Burstein ,  Lior Narkis ,  Avraham Ganor

    IPC: H04L12/933 ,  G06F9/455 ,  G06F13/40

    Abstract: A network interface controller that is connected to a host and a packet communications network. The network interface controller includes electrical circuitry configured as a packet processing pipeline with a plurality of stages. It is determined in the network interface controller that at least a portion of the stages of the pipeline are acceleration-defined stages. Packets are processed in the pipeline by transmitting data to an accelerator from the acceleration-defined stages, performing respective acceleration tasks on the transmitted data in the accelerator, and returning processed data from the accelerator to receiving stages of the pipeline.

    Multi-slot plug-in card
    18.
    发明申请
    Multi-slot plug-in card 有权

    公开(公告)号：US20170172007A1

    公开(公告)日：2017-06-15

    申请号：US14963266

    申请日：2015-12-09

    Applicant: Mellanox Technologies Ltd.

    Inventor： Yuval Itkin ,  Avraham Ganor ,  Andrey Blyahman

    IPC: H05K7/14 ,  H05K3/46

    CPC classification number: H05K7/1452 ,  G06F1/185 ,  H05K1/028 ,  H05K1/117 ,  H05K1/148 ,  H05K3/4611 ,  H05K3/4691 ,  H05K7/1439 ,  H05K2201/10189

    Abstract: Electronic apparatus includes a laminated multi-layer circuit substrate, including first and second rigid cards and a flexible section between the first and second rigid cards. First and second sets of electrical terminals are disposed respectively on the first and second rigid cards and arranged to mate with respective bus connectors configured in accordance with a predefined bus standard. At least one bus interface circuit is configured to communicate over a bus in accordance with the predefined bus standard and disposed on the first rigid card. Printed conductors run continuously from the first rigid card, over the flexible section of the substrate, to the second rigid card and connect the at least one bus interface circuit on the first rigid card to the second set of electrical terminals on the second rigid card.

    Dynamic bandwidth connections
    19.
    发明授权
    Dynamic bandwidth connections 有权

    公开(公告)号：US11921662B2

    公开(公告)日：2024-03-05

    申请号：US17636484

    申请日：2019-08-21

    Applicant: Mellanox Technologies, Ltd.

    Inventor： Dotan Levi ,  Elad Mentovich ,  Ran Ravid ,  Roee Shapiro ,  Avraham Ganor ,  Paraskevas Bakopoulos ,  Dimitrios Kalavrouziotis

    IPC: G06F13/40 ,  G06F13/42

    CPC classification number: G06F13/4004 ,  G06F13/42

    Abstract: Apparatuses, systems, and associated methods of manufacturing are described that provide a dynamic data interconnect and networking cable configuration. The dynamic data interconnect includes a substrate, transmitters supported on the substrate configured to generate signals, and receivers supported on the substrate configured to receive signals. The dynamic data interconnect further includes a number of connection pads that receive data cables attached thereto and a number of transmission lanes that operably couple the transmitters and receivers to the connection pads. The dynamic data interconnect further includes transmission circuitry in communication with each of the transmitters and receivers such that, in an operational configuration, the transmission circuitry determines a transmission state of the dynamic data interconnect and selectively disables operation of at least a portion of the transmitters or at least a portion of the receivers.

    MULTI-HOST NETWORKING SYSTEMS AND METHODS
    20.
    发明公开
    MULTI-HOST NETWORKING SYSTEMS AND METHODS 审中-公开

    公开(公告)号：US20230350833A1

    公开(公告)日：2023-11-02

    申请号：US18346616

    申请日：2023-07-03

    Applicant: MELLANOX TECHNOLOGIES, LTD.

    Inventor： Avraham Ganor

    IPC: G06F13/42 ,  G06F13/40

    CPC classification number: G06F13/4221 ,  G06F13/4022 ,  G06F2213/0024

    Abstract: Systems and method are provided. An illustrative system includes a first compute node having a first processing unit, a first compute node port, and a first peripheral component interconnect bus configured to carry data between the first processing unit and the first compute node port. The system may further include a multi-host device having a first multi-host port, where the first multi-host port is configured to connect with the first compute node port via a first peripheral component interconnect cable, a network port, where the network port is configured to receive a network interface of a networking cable, and processing circuitry configured to translate and carry data between the first multi-host port and the network port.

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