Timebase peripheral
    11.
    发明授权
    Timebase peripheral 有权
    时基外设

    公开(公告)号:US08897324B2

    公开(公告)日:2014-11-25

    申请号:US13753399

    申请日:2013-01-29

    CPC classification number: H04J3/06 G06F1/04

    Abstract: A microcontroller has a timebase driven by a clock signal, wherein the timebase has a reset input and an output coupled with a comparator. The comparator is further coupled with a register and is operable to generate a synchronization output signal if the timebase matches the register value. The microcontroller further has a first multiplexer receiving the synchronization output signal from the comparator and further receiving at least one event signal generated by a unit other than the timebase, wherein the first multiplexer is operable to select either the synchronization output signal or the at least one event signal as a timebase synchronization output signal.

    Abstract translation: 微控制器具有由时钟信号驱动的时基,其中时基具有复位输入和与比较器耦合的输出。 比较器还与寄存器耦合,如果时基匹配寄存器值,则可操作以产生同步输出信号。 微控制器还具有接收来自比较器的同步输出信号的第一多路复用器,并且还接收由除时基之外的单元产生的至少一个事件信号,其中第一多路复用器可操作以选择同步输出信号或至少一个 事件信号作为时基同步输出信号。

    Dynamic Pause Period Calculation for Serial Data Transmission
    12.
    发明申请
    Dynamic Pause Period Calculation for Serial Data Transmission 有权
    串行数据传输的动态暂停周期计算

    公开(公告)号:US20140258566A1

    公开(公告)日:2014-09-11

    申请号:US14199785

    申请日:2014-03-06

    Abstract: A serial transmission peripheral device for transmitting serial transmission data with a variable data length includes a pulse forming unit; and a register programmable to set a desired transmission length. The peripheral device is operable to determine an actual transmission length and calculate a length of a pause pulse and to add the pause pulse at the end of a transmission to generate a transmission having a constant length.

    Abstract translation: 用于发送具有可变数据长度的串行传输数据的串行传输外围设备包括脉冲形成单元; 以及可编程以设置期望的传输长度的寄存器。 外围设备可操作以确定实际的传输长度并计算暂停脉冲的长度,并且在传输结束时添加暂停脉冲以产生具有恒定长度的传输。

    PERIPHERAL SPECIAL FUNCTION REGISTER WITH SOFT-RESET DISABLE
    13.
    发明申请
    PERIPHERAL SPECIAL FUNCTION REGISTER WITH SOFT-RESET DISABLE 有权
    外部特殊功能寄存器具有软复位禁用

    公开(公告)号:US20130198500A1

    公开(公告)日:2013-08-01

    申请号:US13753375

    申请日:2013-01-29

    Inventor: Stephen Bowling

    CPC classification number: G06F1/24 G06F1/325

    Abstract: A microcontroller has a plurality of peripherals, and at least one control bit, wherein the control bit controls a reset of at least one peripheral such that in a first mode any type of reset resets the at least one peripheral of said plurality of peripherals and in a second mode only a power supply reset resets the at least one peripheral.

    Abstract translation: 微控制器具有多个外围设备和至少一个控制位,其中控制位控制至少一个外围设备的复位,使得在第一模式中,任何类型的复位复位所述多个外围设备的至少一个外围设备,并且在 只有电源复位的第二模式复位至少一个外设。

    Automatic Protection Against Runt Pulses

    公开(公告)号:US20220302904A1

    公开(公告)日:2022-09-22

    申请号:US17557204

    申请日:2021-12-21

    Abstract: An apparatus includes an adjustment circuit configured to receive a pulsed-width modulation (PWM) input, generate an adjusted PWM signal based upon the PWM input, and determine that a first pulse of the PWM input is shorter than a runt signal limit. The adjustment circuit is further configured to, in the adjusted PWM signal, extend the first pulse of the PWM input based on the determination that the PWM input is shorter than the runt signal limit, and output the adjusted PWM signal to an electronic device.

    Integrated Circuit Device with Tamper Detection Input and having Real Time Clock Calendar Logging Thereof
    17.
    发明申请
    Integrated Circuit Device with Tamper Detection Input and having Real Time Clock Calendar Logging Thereof 有权
    具有篡改检测输入并具有实时时钟日历记录的集成电路设备

    公开(公告)号:US20150130636A1

    公开(公告)日:2015-05-14

    申请号:US14538253

    申请日:2014-11-11

    CPC classification number: H04Q9/00 G01R22/066 G08B13/00

    Abstract: If an enclosure of a metering device is opened or vandalized, application software must determine when the metering history information became unreliable, and further notification to the utility may be desirable. Likewise, a shipping container or suitcase that has been opened or mishandled during shipping transient may be attributed to a particular location and/or handling person(s) when the time and date of the mishandling occurrence are known. A transition on a special device input from a tamper or mishandling sensor captures real-time clock/calendar (RTCC) information that provides to a software application the time and date of the detected tampering or mishandling event. This transition may also cause memory storage of the RTCC information related to the event. Thus, an integrated circuit device, for example a microcontroller or any other integrated circuit device may comprise such an RTCC and external input, and, optionally, memory storage of the RTCC event occurrence.

    Abstract translation: 如果计量设备的外壳打开或破坏,则应用软件必须确定测量历史信息何时变得不可靠,并且可能需要进一步通知公用程序。 同样地,在运输过程中已经打开或处理不当的运输集装箱或手提箱可能会在处理不当的时间和日期已知时归属于特定的位置和/或处理人员。 来自篡改或误操作传感器的特殊设备输入的转换捕获实时时钟/日历(RTCC)信息,向软件应用程序提供检测到的篡改或误操作事件的时间和日期。 这种转换也可能导致存储与事件相关的RTCC信息。 因此,诸如微控制器或任何其他集成电路设备的集成电路器件可以包括这样的RTCC和外部输入,以及可选地,RTCC事件发生的存储器存储。

    OVERRIDE MECHANISM FOR PWM OPERATION
    19.
    发明公开

    公开(公告)号:US20240275366A1

    公开(公告)日:2024-08-15

    申请号:US18432347

    申请日:2024-02-05

    CPC classification number: H03K3/017

    Abstract: An apparatus includes a pulsed-width modulation (PWM) generator circuit to generate generally complementary PWM signals. The signals are to prevent two complementary switches that receive the complementary PWM signals from both being activated at a same time. The PWM signals are generally complementary with respect to their active portions. The apparatus includes an override circuit to override at least one of the complementary PWM signals to yield adjusted PWM signals. The adjusted PWM signals are to cause the two complementary switches to be activated at a same time when the adjusted PWM signals are received at the two complementary switches.

    System and Method for Configuring Coordinated PWM Generators

    公开(公告)号:US20240204763A1

    公开(公告)日:2024-06-20

    申请号:US18540509

    申请日:2023-12-14

    CPC classification number: H03K7/08 H03K3/70 H03K7/10

    Abstract: A system and method is provided including a first pulse width modulation (PWM) generator circuit including a first timer to generate a first cycle count, a first configuration register to define characteristics of a first electrical pulse to be generated, and a trigger cycle count specifying a timing of a first trigger signal, and a first load enable input to load a new configuration value into the first configuration register, a second PWM generator circuit including a second timer to generate a second cycle count, a second configuration register to define characteristics of a second electrical pulse to be generated, a second load enable input to load a new configuration value into the second configuration register, and a load enable selector to selectively drive the second load enable input based on the first trigger signal.

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