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公开(公告)号:US11824536B2
公开(公告)日:2023-11-21
申请号:US18112812
申请日:2023-02-22
Applicant: Microchip Technology Incorporated
Inventor: Yong Yuenyongsgool , Stephen Bowling , Pedro Ovalle
Abstract: An apparatus includes an adjustment circuit configured to receive a pulsed-width modulation (PWM) input, generate an adjusted PWM signal based upon the PWM input, and determine that a first pulse of the PWM input is shorter than a runt signal limit. The adjustment circuit is further configured to, in the adjusted PWM signal, extend the first pulse of the PWM input based on the determination that the PWM input is shorter than the runt signal limit, and output the adjusted PWM signal to an electronic device.
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公开(公告)号:US09577650B2
公开(公告)日:2017-02-21
申请号:US14186609
申请日:2014-02-21
Applicant: Microchip Technology Incorporated
Inventor: Fredrik Buch , Cristian Albina , Yong Yuenyongsgool
Abstract: A lock-on detection circuit for a phase-locked loop includes circuitry configured to receive first up and down outputs and second up and down outputs from one or more phase detectors and to determine from the first up and down outputs and the second up and down outputs how well the phase-locked loop is locked on to a reference clock.
Abstract translation: 用于锁相环的锁定检测电路包括被配置为从一个或多个相位检测器接收第一上下输出和第二上下输出的电路,并且从第一上升输出和第二上下输出确定 输出锁相环锁定到参考时钟的程度。
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公开(公告)号:US20240006982A1
公开(公告)日:2024-01-04
申请号:US18217053
申请日:2023-06-30
Applicant: Microchip Technology Incorporated
Inventor: Alex Dumais , Andreas Reiter , Yong Yuenyongsgool , Stephen Bowling , Timothy Phoenix , Justin Oshea
CPC classification number: H02M1/088 , H02M3/01 , H02M3/33571 , H02M1/0009
Abstract: An inductor-inductor-capacitor (LLC) power converter includes a current input interface to receive a current input indication. The current input indication includes a voltage to represent a current passing through of a primary side of the LLC power converter. The LLC power converter includes voltage input interface to receive a voltage input. The voltage input is to include a representative voltage to be provided from a secondary side of the LLC power converter. The LLC power converter includes a control circuit to generate pulsed-width modulation (PWM) control signals for the LLC power converter. The control circuit is to match an on-time period of a first leg and a second leg of the LLC power converter and based upon the current input indication and the voltage input.
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公开(公告)号:US20230308084A1
公开(公告)日:2023-09-28
申请号:US18112812
申请日:2023-02-22
Applicant: Microchip Technology Incorporated
Inventor: Yong Yuenyongsgool , Stephen Bowing , Pedro Ovalle
Abstract: An apparatus includes an adjustment circuit configured to receive a pulsed-width modulation (PWM) input, generate an adjusted PWM signal based upon the PWM input, and determine that a first pulse of the PWM input is shorter than a runt signal limit. The adjustment circuit is further configured to, in the adjusted PWM signal, extend the first pulse of the PWM input based on the determination that the PWM input is shorter than the runt signal limit, and output the adjusted PWM signal to an electronic device.
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公开(公告)号:US10936004B2
公开(公告)日:2021-03-02
申请号:US16143967
申请日:2018-09-27
Applicant: Microchip Technology Incorporated
Inventor: Bryan Kris , Igor Wojewoda , Stephen Bowling , Yong Yuenyongsgool
IPC: G06F1/08 , G06F1/20 , G06F11/30 , G01R19/25 , G05B13/02 , G01R23/15 , H03L1/02 , G04G3/04 , G05B19/042
Abstract: A temperature-compensating clock frequency monitor circuit may be provided to detect a clock pulse frequency in an electronic device that may cause erratic or dangerous operation of the device, as a function of an operating temperature of the device. The temperature-compensating clock frequency monitor circuit include a temperature sensor configured to measure a temperature associated with an electronic device, a clock having an operating frequency, and a frequency monitoring system. The frequency monitoring system may be configured to determine the operating frequency of the clock, and based at least on (a) the operating frequency of the clock and (b) the measured temperature associated with the electronic device, generate a corrective action signal to initiate a corrective action associated with the electronic device or a related device. The temperature sensor, clock, and frequency monitoring system may, for example, be provided on a microcontroller.
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公开(公告)号:US10069488B2
公开(公告)日:2018-09-04
申请号:US14669321
申请日:2015-03-26
Applicant: Microchip Technology Incorporated
Inventor: Sean Stacy Steedman , Yong Yuenyongsgool , Jacobus Albertus van Eeden , Joseph Julicher , Marilena Dracea
Abstract: A digitally controlled ramp generator has a constant current source, a first controllable switch coupled between the constant current source and an output node, a capacitor coupled with the output node, a second controllable switch coupled with the output node, a constant current sink coupled with the second controllable switch, and a control unit. The control unit is configured in a first operating mode to select control signals for the first and second controllable switch to generate a rising waveform by charging said capacitor through the first controllable switch and a falling waveform by discharging the capacitor through the second controllable switch wherein the control signals can be selected from the group of a time based control signal and a voltage based control signal. A variety of other control modes may be provided.
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公开(公告)号:US20240275366A1
公开(公告)日:2024-08-15
申请号:US18432347
申请日:2024-02-05
Applicant: Microchip Technology Incorporated
Inventor: Yong Yuenyongsgool , Andreas Reiter , Stephen Bowling , Jason Sachs
IPC: H03K3/017
CPC classification number: H03K3/017
Abstract: An apparatus includes a pulsed-width modulation (PWM) generator circuit to generate generally complementary PWM signals. The signals are to prevent two complementary switches that receive the complementary PWM signals from both being activated at a same time. The PWM signals are generally complementary with respect to their active portions. The apparatus includes an override circuit to override at least one of the complementary PWM signals to yield adjusted PWM signals. The adjusted PWM signals are to cause the two complementary switches to be activated at a same time when the adjusted PWM signals are received at the two complementary switches.
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公开(公告)号:US20240204763A1
公开(公告)日:2024-06-20
申请号:US18540509
申请日:2023-12-14
Applicant: Microchip Technology Incorporated
Inventor: Yong Yuenyongsgool , Andreas Reiter , Stephen Bowling
Abstract: A system and method is provided including a first pulse width modulation (PWM) generator circuit including a first timer to generate a first cycle count, a first configuration register to define characteristics of a first electrical pulse to be generated, and a trigger cycle count specifying a timing of a first trigger signal, and a first load enable input to load a new configuration value into the first configuration register, a second PWM generator circuit including a second timer to generate a second cycle count, a second configuration register to define characteristics of a second electrical pulse to be generated, a second load enable input to load a new configuration value into the second configuration register, and a load enable selector to selectively drive the second load enable input based on the first trigger signal.
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公开(公告)号:US11621702B2
公开(公告)日:2023-04-04
申请号:US17557204
申请日:2021-12-21
Applicant: Microchip Technology Incorporated
Inventor: Yong Yuenyongsgool , Stephen Bowling , Pedro Ovalle
Abstract: An apparatus includes an adjustment circuit configured to receive a pulsed-width modulation (PWM) input, generate an adjusted PWM signal based upon the PWM input, and determine that a first pulse of the PWM input is shorter than a runt signal limit. The adjustment circuit is further configured to, in the adjusted PWM signal, extend the first pulse of the PWM input based on the determination that the PWM input is shorter than the runt signal limit, and output the adjusted PWM signal to an electronic device.
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公开(公告)号:US10515036B2
公开(公告)日:2019-12-24
申请号:US16169480
申请日:2018-10-24
Applicant: Microchip Technology Incorporated
Inventor: Yong Yuenyongsgool , Stephen Bowling , Cobus van Eeden , Igor Wojewoda , Naveen Raj
Abstract: A memory management circuit includes a direct memory access (DMA) channel. The DMA channel includes logic configured to receive a buffer of data to be written using DMA. The DMA channel further includes logic to perform bit manipulation in real-time during a DMA write cycle of the first buffer of data.
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