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    ACTIVATE INFORMATION ON PRECEDING COMMAND
    11.
    发明申请
    ACTIVATE INFORMATION ON PRECEDING COMMAND 有权

    公开(公告)号：US20240393979A1

    公开(公告)日：2024-11-28

    申请号：US18792843

    申请日：2024-08-02

    Applicant: Micron Technology, Inc.

    Inventor： John David Porter ,  Bryan David Kerstetter ,  Kwang-Ho Cho

    IPC: G06F3/06

    Abstract: A method and a device is provided for utilizing unused valid (V) bits residing on a previous command to transmit additional activate information to a memory device. Additional activate information may be transmitted to the memory device without increasing the tRCD time, or increasing the command/address (CA) bus pins, or adding additional circuit area, thereby reducing the impact on the performance of the memory device.

    Memory device with redundancy for page-based repair
    13.
    发明授权
    Memory device with redundancy for page-based repair 有权

    公开(公告)号：US12062407B2

    公开(公告)日：2024-08-13

    申请号：US17823740

    申请日：2022-08-31

    Applicant: Micron Technology, Inc.

    Inventor： Alan John Wilson ,  Donald M. Morgan ,  John David Porter

    IPC: G11C29/54 ,  G11C29/00

    CPC classification number: G11C29/76 ,  G11C29/54 ,  G11C29/808

    Abstract: Apparatus and methods for page-based soft post package repair are disclosed. Based on data stored in a storage element, an address may be decoded to a prime row, a row-based redundant row, or a page-based redundant row. A match logic circuit may determine whether the address corresponds to a defective prime row and generate a match signal. A decoder can select a redundant row to be accessed instead of a prime row in response to the match signal indicating that the address data corresponding to the address to be accessed matches defective address data stored in a volatile memory. A page-based redundant row allows for page-by-page substitution for defective memory, allowing functional portions of memory to continue to be used.

    Adjusting parameters of channel drivers based on temperature
    14.
    发明授权
    Adjusting parameters of channel drivers based on temperature 有权

    公开(公告)号：US11783869B2

    公开(公告)日：2023-10-10

    申请号：US17747499

    申请日：2022-05-18

    Applicant: Micron Technology, Inc.

    Inventor： John David Porter ,  Suryanarayana B. Tatapudi

    IPC: G11C7/04 ,  G06F3/06 ,  G11C11/22

    CPC classification number: G11C7/04 ,  G06F3/0653 ,  G06F3/0655 ,  G11C11/221

    Abstract: Methods, systems, and devices are described for adjusting parameters of channel drivers based on temperature when a calibration component is unavailable. A memory device may determine whether a calibration component is available for use by the memory device. If not, the memory device may select an impedance setting for the driver that is based on an operating temperature of the memory device. A device or system may identify a temperature of a memory device, identify that a calibration component is unavailable to adjust a parameter of a driver of a data channel, select a value of the parameter based on the temperature and on identifying that the calibration component is unavailable, adjust the parameter of the driver of the data channel to the selected value, and transmit, by the driver operating using the selected value of the parameter, a signal over the channel.

    Biasing electronic components using adjustable circuitry
    15.
    发明授权
    Biasing electronic components using adjustable circuitry 有权

    公开(公告)号：US11699466B2

    公开(公告)日：2023-07-11

    申请号：US17546026

    申请日：2021-12-08

    Applicant: Micron Technology, Inc.

    Inventor： John David Porter ,  Suryanarayana B. Tatapudi

    IPC: G11C7/06 ,  G11C5/14

    CPC classification number: G11C7/062 ,  G11C5/147

    Abstract: Embodiments relate to improving the biasing of active electronic components such as, for example, sense amplifiers. Embodiments include an adjustable bias signal generator that receives a reference signal as an input and generates a corresponding bias signal as an output. The adjustable bias signal generator may comprise a voltage driver and capacitor divider circuitry. In some embodiments, the capacitor divider circuitry is configurable by selecting specific capacitor dividers using a digital code. In other embodiments, the voltage driver is adjustable by applying different trim settings to tune the output of the voltage driver. The voltage driver may be temperature compensated by multiplexing different trim settings that correspond to different temperatures.

    TEMPERATURE INTERPOLATION TECHNIQUES FOR MULTIPLE INTEGRATED CIRCUIT REFERENCES
    16.
    发明申请
    TEMPERATURE INTERPOLATION TECHNIQUES FOR MULTIPLE INTEGRATED CIRCUIT REFERENCES 有权

    公开(公告)号：US20220035396A1

    公开(公告)日：2022-02-03

    申请号：US16983811

    申请日：2020-08-03

    Applicant: Micron Technology, Inc.

    Inventor： Anupriya Chakraborty ,  John David Porter ,  Alan John Wilson

    IPC: G05F3/20

    Abstract: Techniques for providing temperature trim codes to multiple reference circuits of an integrated circuit are provided. In an example, a string of primary latch circuits can provide a set of pre-defined temperature trim codes to a multiplexer in response to a token of a series of tokens. The multiplexer can provide two trim of the trim codes to an interpolator based on a temperature reading of the integrated circuit. The interpolator can provide an interpolated trim code and the trim code can be distributed to a reference circuit based on the token.

    OVER-LIMIT ELECTRICAL CONDITION PROTECTION CIRCUITS AND METHODS
    17.
    发明申请
    OVER-LIMIT ELECTRICAL CONDITION PROTECTION CIRCUITS AND METHODS 有权
    超限电气保护电路及方法

    公开(公告)号：US20140240883A1

    公开(公告)日：2014-08-28

    申请号：US14275211

    申请日：2014-05-12

    Applicant: Micron Technology, Inc.

    Inventor： Xiaofeng Fan ,  Michael Chaine ,  John David Porter

    IPC: H02H9/04

    CPC classification number: H02H9/044 ,  H01L27/0248 ,  H01L27/0251 ,  H02H9/046 ,  H05K1/0259

    Abstract: Apparatuses and methods for protecting a circuit from an over-limit electrical condition are disclosed. One example apparatus includes a protection circuit coupled to a circuit to be protected. The circuit to be protected is coupled to a pad node. The protection circuit is configured to conduct current from the pad node to a reference voltage node to protect the circuit from an over-limit electrical condition. The protection circuit has a trigger circuit coupled to the pad node and configured to trigger a shunt circuit to conduct current from the pad node to the reference voltage node responsive to a voltage provided to the pad node having a voltage exceeding a trigger voltage. In some embodiments, the trigger circuit is matched to the circuit being protected.

    Abstract translation: 公开了用于保护电路免受过电压条件的设备和方法。 一个示例性设备包括耦合到要保护的电路的保护电路。 要保护的电路耦合到焊盘节点。 保护电路被配置为将电流从焊盘节点传导到参考电压节点，以保护电路免受超限电气状况的影响。 保护电路具有耦合到焊盘节点的触发电路，并被配置为响应于提供给具有超过触发电压的电压的焊盘节点的电压，触发分流电路以将电流从焊盘节点传导到参考电压节点。 在一些实施例中，触发电路与被保护的电路相匹配。

    Systems and methods to manage memory during power down and storage
    18.
    发明授权
    Systems and methods to manage memory during power down and storage 有权

    公开(公告)号：US12222835B2

    公开(公告)日：2025-02-11

    申请号：US17575399

    申请日：2022-01-13

    Applicant: Micron Technology, Inc.

    Inventor： Angelo Visconti ,  John David Porter

    IPC: G06F11/30 ,  G11C5/14

    Abstract: Systems and methods described herein may enable memory maintenance operations to be performed on a memory device in compliance with a time interval having a duration based on a temperature of the memory device. A system may include a memory device and a memory controller communicatively coupled to the memory device. The memory controller may receive a temperature measurement indicative of a present temperature of the memory device and determine a memory management interval based on the temperature measurement. The memory controller may perform a memory management operation based on the memory management interval. Sometimes, the memory controller powers on the memory device to perform the memory management operation on the memory device.

    MEMORY DEVICE WITH REDUNDANCY FOR PAGE-BASED REPAIR
    20.
    发明公开
    MEMORY DEVICE WITH REDUNDANCY FOR PAGE-BASED REPAIR 审中-公开

    公开(公告)号：US20240071558A1

    公开(公告)日：2024-02-29

    申请号：US17823740

    申请日：2022-08-31

    Applicant: Micron Technology, Inc.

    Inventor： Alan John Wilson ,  Donald M. Morgan ,  John David Porter

    IPC: G11C29/00 ,  G11C29/54

    CPC classification number: G11C29/76 ,  G11C29/54 ,  G11C29/808

    Abstract: Apparatus and methods for page-based soft post package repair are disclosed. Based on data stored in a storage element, an address may be decoded to a prime row, a row-based redundant row, or a page-based redundant row. A match logic circuit may determine whether the address corresponds to a defective prime row and generate a match signal. A decoder can select a redundant row to be accessed instead of a prime row in response to the match signal indicating that the address data corresponding to the address to be accessed matches defective address data stored in a volatile memory. A page-based redundant row allows for page-by-page substitution for defective memory, allowing functional portions of memory to continue to be used.

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