公开(公告)号：US11977480B2

公开(公告)日：2024-05-07

申请号：US17854797

申请日：2022-06-30

Applicant: MICRON TECHNOLOGY, INC.

Inventor： Mikai Chen ,  Zhenlei Shen ,  Murong Lang ,  Zhenming Zhou

IPC: G06F12/00 ,  G06F3/06 ,  G06F11/07 ,  G06F11/30 ,  G06F12/02

CPC classification number: G06F12/0246 ,  G06F3/0614 ,  G06F11/076 ,  G06F11/0772 ,  G06F11/3037 ,  G06F12/0253 ,  G06F2212/7211

Abstract: A scaling factor for a data unit of a memory device is obtained. The scaling factor corresponds to a difference between a first error rate associated with a first set of memory access operations performed at the data unit and a second error rate associated with a second set of memory access operations performed at the data unit. A media management operation is scheduled on the data unit in view of the scaling factor.

公开(公告)号：US11914510B2

公开(公告)日：2024-02-27

申请号：US17736824

申请日：2022-05-04

Applicant: Micron Technology Inc.

Inventor： Mikai Chen ,  Zhengang Chen ,  Charles See Yeung Kwong

IPC: G06F12/06 ,  G06F12/02

CPC classification number: G06F12/0607 ,  G06F12/0207 ,  G06F2212/1032

Abstract: In a memory sub-system, data can be received to be stored at a 3-dimensional (3D) memory component in response to a write operation. A first location of a first layer of the 3D memory component is determined at which to store a first portion of the data, where the first layer is within a first logical unit. A second location of a second layer of the 3D memory component is determined at which to store a second portion of the data, where the second layer is within a second logical unit that is different than the first logical unit. The first portion of the data is caused to be stored in first memory cells at the first location within the first layer. The second portion of the data is caused to be stored in second memory cells at the second location within the second layer.

公开(公告)号：US20230043775A1

公开(公告)日：2023-02-09

申请号：US17393112

申请日：2021-08-03

Applicant: Micron Technology, Inc.

Inventor： Mikai Chen ,  Zhenlei Shen ,  Murong Lang ,  Zhenming Zhou

IPC: G11C7/20 ,  G11C7/10 ,  G11C11/4096 ,  G11C5/14

Abstract: A system comprising includes a memory device having memory cells a processing device, operatively coupled to the memory device. The processing device is to perform operations including: determining a length of time the memory device has been powered off; and in response to determining that the length of time satisfies a threshold value: for each of multiple groups of memory cells, asserting a corresponding flag; determining, based on the length of time, one or more adjusted demarcation voltages to be used in reading a state of the multiple groups of memory cells; and storing the one or more adjusted demarcation voltages for use in performing memory operations.

公开(公告)号：US11341046B2

公开(公告)日：2022-05-24

申请号：US16531305

申请日：2019-08-05

Applicant: MICRON TECHNOLOGY, INC.

Inventor： Mikai Chen ,  Zhengang Chen ,  Charles See Yeung Kwong

IPC: G06F12/06 ,  G06F12/02

Abstract: Data can be received to be stored at a memory component. A first location of a first layer of the memory component to store a first portion of the data can be determined. A second location of a second layer of the memory component to store a second portion of the data can be determined, where the second layer is different from the first layer. The first portion of the data can be stored at the first layer of the memory component and the second portion of the data can be stored at the second layer of the memory component.

公开(公告)号：US11231870B1

公开(公告)日：2022-01-25

申请号：US16990928

申请日：2020-08-11

Applicant: Micron Technology, Inc.

Inventor： Mikai Chen ,  Murong Lang ,  Zhenming Zhou

IPC: G06F3/00 ,  G06F3/06 ,  G11C13/00 ,  G11C16/04

Abstract: A method includes performing a quantity of write cycles on memory components. The method can further include monitoring codewords, and, for each of the codewords including a first error parameter value, determining a second error parameter value. The method can further include determining a probability that each of the codewords is associated with a particular one of the second error parameter values at the first error parameter value and determining a quantity of each of the codewords that are associated with each of the determined probabilities. The method can further include determining a statistical boundary of the quantity of each of the codewords and determining a correlation between the quantity of write cycles performed and the corresponding determined statistical boundary of the quantity of each of the codewords.

公开(公告)号：US11222710B1

公开(公告)日：2022-01-11

申请号：US16988897

申请日：2020-08-10

Applicant: Micron Technology, Inc.

Inventor： Mikai Chen ,  Zhenming Zhou ,  Zhenlei Shen ,  Murong Lang

IPC: G11C29/44 ,  G11C29/02 ,  G11C29/12 ,  G11C5/06 ,  G11C5/02

Abstract: A method includes determining, for a plurality of memory dice, a signal reliability characteristic and ranking the plurality of memory dice based, at least in part, on the determined reliability characteristics. The method can further include arranging the plurality of memory dice to form a memory device based, at least in part, on the ranking.