公开(公告)号：US20240203507A1

公开(公告)日：2024-06-20

申请号：US18531100

申请日：2023-12-06

Applicant: Micron Technology, Inc.

Inventor： Tomer Tzvi Eliash ,  Yu-Chung Lien ,  Zhengang Chen ,  Jameer Mulani

IPC: G11C16/10 ,  G11C16/08 ,  G11C29/52

CPC classification number: G11C16/102 ,  G11C16/08 ,  G11C29/52

Abstract: A processing device, operatively coupled with a memory device, performs a first programming operation on a first set of cells associated with a first wordline of a first die of the memory device. The processing device identifies, based on a first predefined value, a second wordline of a second die of the memory device, wherein the first predefined value is a shift in an index value of the first wordline of the first die of the memory device. The processing device further performs a second programming operation on a second set of cells associated with the second wordline of the second die, wherein the second wordline of the second die is associated with a different index value than the first wordline of the first die.

公开(公告)号：US20240029801A1

公开(公告)日：2024-01-25

申请号：US18211802

申请日：2023-06-20

Applicant: MICRON TECHNOLOGY, INC.

Inventor： Dung Viet Nguyen ,  Patrick R. Khayat ,  Zhengang Chen ,  Shantilal Rayshi Doru ,  Hope Abigail Henry

IPC: G11C16/34 ,  G11C16/26

CPC classification number: G11C16/3404 ,  G11C16/26

Abstract: Described are systems and methods for memory read calibration based on memory device-originated metrics characterizing voltage distributions. An example memory device includes: a memory array having a plurality of memory cells and a controller coupled to the memory array. The controller is to perform operations including: receiving a first metric characterizing threshold voltage distributions of a subset of the plurality of memory cells; determining a first read voltage adjustment; receiving a second metric characterizing the threshold voltage distributions; determining a second read voltage adjustment; and applying the second read voltage adjustment for reading the subset of the plurality of memory cells.

公开(公告)号：US11768766B2

公开(公告)日：2023-09-26

申请号：US17676595

申请日：2022-02-21

Applicant: Micron Technology, Inc.

Inventor： Zhengang Chen ,  Jianmin Huang

IPC: G06F12/00 ,  G06F12/02 ,  G06F12/0804 ,  G06F12/0817 ,  G06F9/30 ,  G06F11/10 ,  G06F12/14

CPC classification number: G06F12/0246 ,  G06F9/30029 ,  G06F11/1032 ,  G06F12/0804 ,  G06F12/0822 ,  G06F12/1466 ,  G06F2212/7207

Abstract: Disclosed in some examples are methods, systems, devices, and machine-readable mediums that provide for techniques for scrambling and/or updating meta-data that enable an efficient internal copyback operation. In some examples, in order to update the meta-data, the meta-data and host-data are separated and the only the meta-data is sent to the controller to be updated during a modified internal copyback operation. The host-data is not transmitted to the controller. While sending the meta-data utilizes resources of the communication link between the memory dies and the controller, it uses much fewer resources than if the host-data were also transmitted.

公开(公告)号：US11726671B2

公开(公告)日：2023-08-15

申请号：US17357436

申请日：2021-06-24

Applicant: Micron Technology, Inc.

Inventor： Guang Hu ,  Jianmin Huang ,  Zhengang Chen

IPC: G06F3/06

CPC classification number: G06F3/0622 ,  G06F3/0655 ,  G06F3/0679

Abstract: A method includes determining one or more quality attributes for memory cells of a memory device, receiving a memory access request involving data written to at least a portion of the memory cells, and determining whether the memory access request corresponds to a random read operation or a sequential read operation. The method further includes responsive to determining that the memory access request corresponds to a random read operation or responsive to determining that the one or more quality attributes for memory cells are greater than a threshold quality level, or both, selecting a read mode for use in performance of the random read operation and performing the random read operation using the selected read mode.

公开(公告)号：US11561734B2

公开(公告)日：2023-01-24

申请号：US17332187

申请日：2021-05-27

Applicant: Micron Technology, Inc.

Inventor： Zhengang Chen ,  Tingjun Xie

IPC: G06F12/00 ,  G06F3/06 ,  G11C16/10 ,  G06F16/245 ,  G11C16/26

Abstract: A system includes a memory component; and a processing device, operatively coupled with the memory component. The processing device is to perform operations including receiving a read request with respect to data stored at a physical address of the memory component; determining whether an indicator of the physical address is stored in a write transaction catalog; in response to determining that the physical address is stored in the write transaction catalog, determining a time difference between when the read request was received and when the data was written; reading the data stored at the physical address using a first read voltage level in response to determining that the time difference is less than a threshold criterion; and reading the data stored at the physical address using a second read voltage level in response to determining that the time difference is equal to or greater than the threshold criterion.

公开(公告)号：US20220261341A1

公开(公告)日：2022-08-18

申请号：US17739578

申请日：2022-05-09

Applicant: Micron Technology, Inc.

Inventor： Zhengang Chen ,  Jianmin Huang

IPC: G06F12/02 ,  G06F12/14 ,  G06F13/16 ,  H04L9/06 ,  H04L9/08 ,  G11C11/56

Abstract: Disclosed in some examples are methods, systems, devices, and machine-readable mediums that provide for techniques for scrambling and/or updating meta-data that enable an efficient internal copyback operation. In some examples, improved data distribution techniques decouple the scrambling key from a physical address to allow for copyback operations while maintaining data distribution requirements across a memory device. The controller may generate a seed value that is used by a scrambling algorithm to scramble the host-data and meta-data prior to the data being written. The seed value is then encoded and written to the page with encoded versions of the scrambled user data and meta-data—the random seed is written without scrambling the random seed.

公开(公告)号：US11281533B2

公开(公告)日：2022-03-22

申请号：US16947311

申请日：2020-07-28

Applicant: Micron Technology, Inc.

Inventor： Ying Yu Tai ,  Jiangli Zhu ,  Zhengang Chen

IPC: H03M13/00 ,  G06F11/10 ,  H03M13/29 ,  H03M13/37

Abstract: Data stored on each of a set of memory components can be read. Corresponding data stored on a number of the set of memory components that cannot be decoded using an error correction code decoding operation can be identified. A determination can be made whether the number of the set of memory components that include the corresponding data that cannot be decoded from the ECC decoding operation satisfies a threshold condition. Responsive to determining that the number of the set of memory components that include the corresponding data that cannot be decoded from the second ECC decoding operation satisfies the threshold condition, a processing device, can perform a redundancy error correction decoding operation to correct the data stored on each of the set of memory components.

公开(公告)号：US11256617B2

公开(公告)日：2022-02-22

申请号：US16837384

申请日：2020-04-01

Applicant: Micron Technology, Inc.

Inventor： Zhengang Chen ,  Jianmin Huang

IPC: G06F12/02 ,  G06F12/0804 ,  G06F12/0817 ,  G06F9/30 ,  G06F11/10 ,  G06F12/14

Abstract: Disclosed in some examples are methods, systems, devices, and machine-readable mediums that provide for techniques for scrambling and/or updating meta-data that enable an efficient internal copyback operation. In some examples, in order to update the meta-data, the meta-data and host-data are separated and the only the meta-data is sent to the controller to be updated during a modified internal copyback operation. The host-data is not transmitted to the controller. While sending the meta-data utilizes resources of the communication link between the memory dies and the controller, it uses much fewer resources than if the host-data were also transmitted.

公开(公告)号：US20210311869A1

公开(公告)日：2021-10-07

申请号：US16837384

申请日：2020-04-01

Applicant: Micron Technology, Inc.

Inventor： Zhengang Chen ,  Jianmin Huang

IPC: G06F12/02 ,  G06F12/0804 ,  G06F12/0817 ,  G06F12/14 ,  G06F9/30 ,  G06F11/10

Abstract: Disclosed in some examples are methods, systems, devices, and machine-readable mediums that provide for techniques for scrambling and/or updating meta-data that enable an efficient internal copyback operation. In some examples, in order to update the meta-data, the meta-data and host-data are separated and the only the meta-data is sent to the controller to be updated during a modified internal copyback operation. The host-data is not transmitted to the controller. While sending the meta-data utilizes resources of the communication link between the memory dies and the controller, it uses much fewer resources than if the host-data were also transmitted.

公开(公告)号：US20210273652A1

公开(公告)日：2021-09-02

申请号：US16806777

申请日：2020-03-02

Applicant: Micron Technology, Inc.

Inventor： Eyal En Gad ,  Zhengang Chen ,  Sivagnanam Parthasarathy ,  Yoav Weinberg

IPC: H03M13/11 ,  H03M13/15 ,  H03M13/29 ,  H03M13/09

Abstract: A processing device in a memory system reads a sense word from a memory device and executes a plurality of parity check equations on corresponding subsets of the sense word to determine a plurality of parity check equation results. The processing device determines a syndrome for the sense word using the plurality of parity check equation results, determines whether the syndrome for the sense word satisfies a codeword criterion, and responsive to the syndrome for the sense word not satisfying the codeword criterion, performs an iterative LDPC correction process, wherein at least one iteration after a first iteration in the LDPC correction process uses a criterion based at least partially on a previous iteration or partial iteration.