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104 条记录 (耗时 0.032 秒)

    Microcomputer system
    11.
    发明授权
    Microcomputer system 失效
    微电脑系统

    公开(公告)号：US4901227A

    公开(公告)日：1990-02-13

    申请号：US89871

    申请日：1987-08-27

    申请人： Masahiro Nomura ,  Yukio Maehashi

    发明人： Masahiro Nomura ,  Yukio Maehashi

    IPC分类号： G06F9/32 ,  G06F9/38 ,  G06F12/00 ,  G06F13/16 ,  G11C8/04

    CPC分类号： G06F9/3802 ,  G06F9/321 ,  G11C8/04

    摘要： A microcomputer system comprises a microprocessor and a memory chip which has on a single semiconductor substrate a pointer for indicating an address of an instruction code fetch destination, an incrementer for incrementing the pointer and a memory for storing programs and data. The microprocessor controls the update timing of the pointer in the memory chip, so that the instruction codes can be continuously read from the memory of the memory chip without outputting the addresses of the instruction code fetch destination from the microprocessor.

    摘要翻译： 微计算机系统包括微处理器和存储器芯片，其在单个半导体衬底上具有用于指示指令代码取出目的地的地址的指针，用于递增指针的增量器和用于存储程序和数据的存储器。 微处理器控制存储器芯片中的指针的更新定时，从而可以从存储器芯片的存储器连续地读取指令代码，而不从微处理器输出指令代码取出目的地的地址。

    Method and apparatus to read in bar-coded information
    12.
    发明授权
    Method and apparatus to read in bar-coded information 失效
    用条形码信息读取的方法和装置

    公开(公告)号：US4140271A

    公开(公告)日：1979-02-20

    申请号：US668036

    申请日：1976-03-18

    申请人： Tadao Nojiri ,  Akio Sugiura ,  Masahiro Nomura

    发明人： Tadao Nojiri ,  Akio Sugiura ,  Masahiro Nomura

    IPC分类号： G06K7/10

    CPC分类号： G06K7/1093

    摘要： Bar symbols having different bar width for representing information are grouped and recorded on a surface of an object. A light-responsive sensor is swept automatically to repetitively scan the density of the surface-reflected light along the direction in which thegrouped bar symbols are arranged, while the object is moved orthogonally thereto. Electrical signals indicative of the bar width derived from the sensor are processed thereafter for the read-in of the coded data.

    摘要翻译： 具有用于表示信息的不同条宽的条形符号被分组并记录在对象的表面上。 自动扫描光响应传感器，以沿物体与其正交移动的方向重复扫描表面反射光的沿着分组的条形符号排列方向的密度。 此后，对从传感器导出的条形宽度的电信号进行处理，以便读取编码数据。

    Multi-power source semiconductor device
    14.
    发明授权
    Multi-power source semiconductor device 有权
    多功率源半导体器件

    公开(公告)号：US08125261B2

    公开(公告)日：2012-02-28

    申请号：US10565190

    申请日：2004-07-15

    申请人： Masahiro Nomura

    发明人： Masahiro Nomura

    IPC分类号： H03K3/00

    CPC分类号： G06F1/324 ,  G06F1/10 ,  G06F1/3203 ,  G06F1/3296 ,  H03K5/133 ,  H03K5/135 ,  H03K2005/00032 ,  H03K2005/00045 ,  H03K2005/0013 ,  Y02D10/126 ,  Y02D10/172

    摘要： In a multi-supply-voltage semiconductor device including multiple blocks each of which has independent clock circuit, and operating with variable power supply, variable delay circuit which changes the amount of delay in accordance with the voltage value of the variable power supply is provided to a clock signal supplied to several blocks from clock generator circuit. This can reduce clock skew between the blocks even when the power supply voltage of variable power supply is changed.

    摘要翻译： 在包括多个块的多电源电压半导体器件中，每个具有独立的时钟电路，并且用可变电源进行工作，根据可变电源的电压值改变延迟量的可变延迟电路被提供给 从时钟发生器电路提供给几个块的时钟信号。 即使在可变电源的电源电压发生变化的情况下，也可以减少块之间的时钟偏移。

    SEMICONDUCTOR INTEGRATED CIRCUIT AND VOLTAGE CONTROLLER THEREWITH
    17.
    发明申请
    SEMICONDUCTOR INTEGRATED CIRCUIT AND VOLTAGE CONTROLLER THEREWITH 审中-公开
    半导体集成电路和电压控制器

    公开(公告)号：US20110187419A1

    公开(公告)日：2011-08-04

    申请号：US13017268

    申请日：2011-01-31

    申请人： Yoshifumi Ikenaga ,  Masahiro Nomura

    发明人： Yoshifumi Ikenaga ,  Masahiro Nomura

    IPC分类号： H03B19/00 ,  G05F1/10

    CPC分类号： G05F1/10 ,  H03B19/00

    摘要： A semiconductor integrated circuit is capable of accurately detecting the characteristics of a chip. The semiconductor integrated circuit includes a monitor circuit and a control circuit. The control circuit generates a clock pulse signal having M successive pulses (M is 2 or a greater integer), and outputs the clock pulse signal to the monitor circuit. The monitor circuit includes a frequency divider and a ring oscillator. The frequency divider frequency divides the clock pulse signal by M and generates the resulting signal as an enable signal. The ring oscillator generates an oscillation signal as a monitor output value during a period defined in accordance with the enable signal.

    摘要翻译： 半导体集成电路能够准确地检测芯片的特性。 半导体集成电路包括监视电路和控制电路。 控制电路产生具有M个连续脉冲（M为2或更大整数）的时钟脉冲信号，并将该时钟脉冲信号输出到监视电路。 监视电路包括分频器和环形振荡器。 分频器频率将时钟脉冲信号除以M，并产生结果信号作为使能信号。 环形振荡器在根据使能信号定义的周期期间产生作为监视器输出值的振荡信号。

    Level converting circuit
    18.
    发明授权
    Level converting circuit 有权
    电平转换电路

    公开(公告)号：US07671656B2

    公开(公告)日：2010-03-02

    申请号：US12196422

    申请日：2008-08-22

    申请人： Masahiro Nomura

    发明人： Masahiro Nomura

    IPC分类号： H03L5/00

    CPC分类号： H03K19/018521

    摘要： A level shifter in which short circuit current and the increase in delay are reduced when a first power source is controlled. In a level shifter for converting a signal level of a first logic circuit to which a first power source is supplied into a signal level of a second logic circuit to which a second power source is supplied, the circuit includes a switching circuit between a GND power source terminal of a level shift core circuit and a GND power source. The switching circuit is controlled by a third logic circuit which generates a control signal under control of the first power source, and a pull-up/pull-down circuit at an output of the level shift core circuit. The pull-up and/or pull-down circuit is controlled by the third logic circuit.

    摘要翻译： 当控制第一电源时，降低短路电流和延迟增加的电平移位器。 在用于将提供第一电源的第一逻辑电路的信号电平转换为提供第二电源的第二逻辑电路的信号电平的电平移位器中，所述电路包括在GND电源 电平移位核心电路的源极端子和GND电源。 开关电路由在第一电源的控制下产生控制信号的第三逻辑电路和在电平移位核心电路的输出端的上拉/下拉电路来控制。 上拉和/或下拉电路由第三逻辑电路控制。

    Novel Cyclic Aminophenylalkanoic Acid Derivative
    19.
    发明申请
    Novel Cyclic Aminophenylalkanoic Acid Derivative 审中-公开
    新型环状氨基苯基链烷酸衍生物

    公开(公告)号：US20090036489A1

    公开(公告)日：2009-02-05

    申请号：US11886909

    申请日：2006-03-22

    申请人： Masahiro Nomura ,  Yasuo Takano ,  Kazuhiro Yumoto ,  Kyoko Okada ,  Takehiro Shinozaki ,  Shigeki Isogai

    发明人： Masahiro Nomura ,  Yasuo Takano ,  Kazuhiro Yumoto ,  Kyoko Okada ,  Takehiro Shinozaki ,  Shigeki Isogai

    IPC分类号： A61K31/4535 ,  C07D401/12 ,  A61P3/04 ,  A61P3/10

    CPC分类号： C07D417/12 ,  C07D409/12

    摘要： The present invention provides cyclic aminophenylalkanoic acid derivatives that act as agonists for human peroxisome proliferator-activated receptors (PPARs), in particular human PPARα isoform, and are effective in the treatment of abnormal lipid metabolism, diabetes and other disorders. The present invention also provides addition salts of such cyclic aminophenylalkanoic acid derivatives and pharmaceutical compositions containing these compounds.Specifically, the present invention provides cyclic aminophenylalkanoic acid derivatives represented by the following general formula (1): , or pharmaceutically acceptable salts thereof.

    摘要翻译： 本发明提供了作为人类过氧化物酶体增殖物激活受体（PPAR），特别是人PPARα同种型的激动剂的环状氨基苯基链烷酸衍生物，并且有效治疗脂质代谢异常，糖尿病等疾病。 本发明还提供了这种环状氨基苯基链烷酸衍生物的加成盐和含有这些化合物的药物组合物。 具体地说，本发明提供由以下通式（1）表示的环状氨基苯基链烷酸衍生物或其药学上可接受的盐。

    Programmable semiconductor device
    20.
    发明授权
    Programmable semiconductor device 失效
    可编程半导体器件

    公开(公告)号：US07446562B2

    公开(公告)日：2008-11-04

    申请号：US11628532

    申请日：2005-05-25

    申请人： Masahiro Nomura ,  Koichi Takeda

    发明人： Masahiro Nomura ,  Koichi Takeda

    IPC分类号： H01L25/00 ,  H03K19/177

    CPC分类号： H03K19/17748 ,  H03K19/17736 ,  H03K19/1778 ,  H03K19/17792

    摘要： A programmable semiconductor device of the invention includes: processing element unit executing a predetermined operation; input/output connection unit acting as a signal input part and/or a signal output part in processing element unit; interconnecting unit, comprised of a plurality of wires, connecting processing element unit via input/output connection unit; bidirectional repeater unit, arranged between the intersection points of interconnecting unit, performing disconnection, or driving interconnecting unit in the forward direction or in the reverse direction; and interconnection connecting unit, arranged at the intersection point, connecting interconnecting unit at the intersection point.

    摘要翻译： 本发明的可编程半导体器件包括：执行预定操作的处理元件单元; 用作信号输入部分的输入/输出连接单元和/或处理元件单元中的信号输出部分; 由多根电线组成的互连单元，经由输入/输出连接单元连接处理元件单元; 双向中继器单元，布置在互连单元的交点之间，在正向或反向上执行断开或驱动互连单元; 和互连连接单元，布置在交点处，交叉点处连接互连单元。