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公开(公告)号：US20220334773A1
公开(公告)日：2022-10-20
申请号：US17856556
申请日：2022-07-01
Applicant: Micron Technology, Inc.
Inventor： Luca Porzio , Roberto Izzi , Nicola Colella , Danilo Caraccio , Alessandro Orlando
Abstract: A processing device of a memory sub-system can monitor a plurality of received commands to identify a forced unit access command. The processing device can identify a metadata area of the memory device based on the forced unit access command. The processing device can also perform an action responsive to identifying a subsequent forced unit access command to the metadata area.
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公开(公告)号：US20220253387A1
公开(公告)日：2022-08-11
申请号：US17169042
申请日：2021-02-05
Applicant: Micron Technology, Inc.
Inventor： Alessandro Orlando , Danilo Caraccio , Angelo Alberto Rovelli
IPC: G06F12/1027 , G06F3/06 , G06F9/455 , G06F9/30
Abstract: Systems, apparatuses, and methods related to memory tracing in an emulated computing system are described. Static tracepoints can be inserted into a particular function as part of operating the emulated computing system. By executing the function including the static tracepoints as part of a memory access request, the emulated computing system can receive information corresponding to both a virtual address and a physical address in a real computing system in which data corresponding to the memory access request is stored.
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公开(公告)号：US20220207193A1
公开(公告)日：2022-06-30
申请号：US17562916
申请日：2021-12-27
Applicant: Micron Technology, Inc.
Inventor： Danilo Caraccio , Federica Cresci , Alessandro Orlando , Paolo Amato , Angelo Alberto Rovelli , Craig A. Jones , Niccolò Izzo
Abstract: Systems, apparatuses, and methods related to security management for a ferroelectric memory device are described. An example method can include receiving, at a memory controller and from a host, a command and firmware data. The memory controller can manage a non-volatile memory device, such as a ferroelectric memory device, and the host and the memory controller can communicate using a compute express link (CXL) protocol. The command can be executed to update firmware stored on the non-volatile memory device. The method can further include accessing a first public key from the non-volatile memory device. The method can further include validating the first public key with a second public key within the firmware data. The method can further include validating the firmware data. The method can further include verifying a security version of the firmware data. The method can further include updating the non-volatile memory device with the firmware data.
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公开(公告)号：US20250013458A1
公开(公告)日：2025-01-09
申请号：US18894289
申请日：2024-09-24
Applicant: Micron Technology, Inc.
Inventor： Niccolo Izzo , Alessandro Orlando , Danilo Caraccio , David Hulton
Abstract: Methods, systems, and devices for techniques for managing offline identity upgrades are described. A memory system may receive a command to update a device identifier for a device identifier composition engine (DICE) associated with the memory system. The memory system may generate an updated device identifier, at a first software layer of a set of software layers of the DICE, based on receiving the command. The memory system may decrypt a device specific key (DSK) stored at a read-only memory device of the memory system based on the received command, and sign the updated device identifier using the DSK based on decrypting the DSK. The memory system may execute one or more operations associated with the first software layer of the set of software layers of the DICE based on the signed updated device identifier.
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公开(公告)号：US20240070284A1
公开(公告)日：2024-02-29
申请号：US18237247
申请日：2023-08-23
Applicant: Micron Technology, Inc.
Inventor： Alessandro Orlando , Niccolò Izzo , Angelo Alberto Rovelli , Danilo Caraccio , Federica Cresci , Craig A. Jones
IPC: G06F21/57
CPC classification number: G06F21/575 , G06F21/572 , G06F2221/033
Abstract: Protection for a secure boot procedure can be provided in addition to cryptographic verification of boot firmware associated with the boot procedure. While the boot firmware is being verified, an open sub-system can be placed into a halt state, during which the open sub-system is prevented from performing the boot procedure. The open sub-system can be subsequently placed into a resume state to further perform the boot procedure when the boot firmware is verified. The open sub-system is still prevented from performing the boot procedure even if the boot firmware is verified unless the open sub-system is placed into the resume state again.
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Patent Agency Ranking
公开(公告)号：US20240070283A1
公开(公告)日：2024-02-29
申请号：US18237229
申请日：2023-08-23
Applicant: Micron Technology, Inc.
Inventor： Alessandro Orlando , Niccolò Izzo , Angelo Alberto Rovelli , Danilo Caraccio , Federica Cresci , Craig A. Jones
IPC: G06F21/57
CPC classification number: G06F21/575 , G06F21/572
Abstract: Protection for a secure boot procedure can be provided in addition to cryptographic verification of boot firmware associated with the boot procedure. While the boot firmware is being verified and executed at a secure sub-system, an open sub-system can be put into a halt state, during which the open sub-system is prevented from performing the boot procedure. The open sub-system is still prevented from performing the boot procedure even if the boot firmware is verified and/or executed unless the open sub-system is put into the resume state again.
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公开(公告)号：US20230367663A1
公开(公告)日：2023-11-16
申请号：US18137895
申请日：2023-04-21
Applicant: Micron Technology, Inc.
Inventor： Luca Porzio , Alessandro Orlando , Danilo Caraccio , Roberto Izzi
CPC classification number: G06F11/073 , G06F11/0772 , G06F11/076 , G06F11/0781 , G06F11/3037
Abstract: Methods, systems, and devices for detecting page fault traffic are described. A memory device may execute a self-learning algorithm to determine a priority size for read requests, such as a maximum readahead window size or other size related to page faults in a memory system. The memory device may determine the priority size based at least in part on by tracking how many read requests are received for different sizes of sets of data. Once the priority size is determined, the memory device may detect subsequent read requests for sets of data having the priority size, and the memory device may prioritize or other optimize the execution of such read requests.
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公开(公告)号：US20230274002A1
公开(公告)日：2023-08-31
申请号：US17682928
申请日：2022-02-28
Applicant: Micron Technology, Inc.
Inventor： Alessandro Orlando , Niccolo' Izzo , Danilo Caraccio
CPC classification number: G06F21/572 , H04L9/3263 , G06F2221/033 , G06F9/4406
Abstract: Disclosed in some examples are methods, systems, and devices for authenticating a firmware object on a device and in some examples to safeguard the attestation process from the execution of malicious firmware. In some examples, a firmware update process may, in addition to updating the firmware on the device, write a hash of the authentic firmware code in a secure storage device (e.g., a register). This may be done in some examples in a protected environment (e.g., a trusted execution environment or a protected firmware update process). Upon first boot after the update, a firmware update checker compares the firmware object that is booted with the value of the secure storage device. If the values match, the alias certificate may be regenerated, and the boot continues. If the values do not match, then the alias certificate may not be regenerated, and the system may have an authenticity failure because the key and the certificate do not match.
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公开(公告)号：US10937491B2
公开(公告)日：2021-03-02
申请号：US16922883
申请日：2020-07-07
Applicant: Micron Technology, Inc.
Inventor： Graziano Mirichigni , Marco Sforzin , Alessandro Orlando
Abstract: Methods, systems, and devices related to auto-referenced memory cell read techniques are described. The auto-referenced read may encode user data to include a certain number bits having a first logic state prior to storing the user data in memory cells. Subsequently, reading the encoded user data may be carried out by applying a read voltage to the memory cells while monitoring a series of switching events by activating a subset of the memory cells having the first logic state. The auto-referenced read may identify a particular switching event that correlates to a median threshold voltage value of the subset of the memory cells. Then, the auto-referenced read may determine a reference voltage that takes into account a statistical property of threshold voltage distribution of the subset of the memory cells. The auto-referenced read may identify a time duration to maintain the read voltage based on determining the reference voltage. When the time duration expires, the auto-referenced read may determine that the memory cells that have been activated correspond to the first logic state.
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公开(公告)号：US20210020239A1
公开(公告)日：2021-01-21
申请号：US17062127
申请日：2020-10-02
Applicant: Micron Technology, Inc.
Inventor： Graziano Mirichigni , Paolo Amato , Federico Pio , Alessandro Orlando , Marco Sforzin
Abstract: Methods, systems, and devices related to auto-referenced memory cell read techniques are described. The auto-referenced read may encode user data to include a predetermined number of bits having a first logic state prior to storing the user data in memory cells. The auto-referenced read may store a total number of bits of the user data having a first logic state in a separate set of memory cells. Subsequently, reading the user data may be carried out by applying a read voltage to the memory cells storing the user data while monitoring a series of switching events by activating a subset of the memory cells having the first logic state. During the read operation, the auto-referenced read may compare the number of activated memory cells to either the predetermined number or the total number to determine whether all the bits having the first logic state has been detected. When the number of activated memory cells matches either the predetermined number or the total number, the auto-referenced read may determine that the memory cells that have been activated correspond to the first logic state.
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