公开(公告)号：US12106980B2

公开(公告)日：2024-10-01

申请号：US17604977

申请日：2019-07-22

Applicant: OSRAM Opto Semiconductors GmbH

Inventor： Hubert Halbritter ,  Alexander Pfeuffer ,  Mikko Peraelae

IPC: H01L21/67 ,  H01L21/683

CPC classification number: H01L21/67132 ,  H01L21/67144 ,  H01L21/683

Abstract: In an embodiment an adhesive transfer stamp for transferring semiconductor chips includes a volume region including an electrically insulating material, at least one adhesive surface configured to receive a semiconductor chip and an electrically conductive element configured to electrically conductively connected to a ground conductor during operation and to dissipate electrical charges from the semiconductor chip to the ground conductor, wherein the volume region is embodied as a solid body, and wherein the volume region has at least one stepped structure.

公开(公告)号：US20230321970A1

公开(公告)日：2023-10-12

申请号：US17766622

申请日：2020-10-05

Applicant: OSRAM Opto Semiconductors GmbH

Inventor： Alexander Pfeuffer ,  Korbinian Perzlmaier

IPC: B32B43/00

CPC classification number: B32B43/006

Abstract: In an embodiment a component assembly includes a plurality of components, a carrier, wherein the components are secured on the carrier by a connecting layer, wherein, for each component, the connecting layer forms at least one supporting structure at which the connecting layer is adjacent to the component, and a sacrificial layer arranged regionally between the components and the connecting layer, wherein one portion of the components is assigned to a first group, wherein a further portion of the components is assigned to a second group, and wherein the components of the first group are different than the components of the second group in respect of a coverage with the sacrificial layer.

公开(公告)号：US20170012187A1

公开(公告)日：2017-01-12

申请号：US15117739

申请日：2015-02-09

Applicant: OSRAM OPTO SEMICONDUCTORS GMBH

Inventor： Alexander Pfeuffer

IPC: H01L33/60 ,  H01L33/44

CPC classification number: H01L33/60 ,  H01L33/0079 ,  H01L33/405 ,  H01L33/44 ,  H01L2933/0016 ,  H01L2933/0058 ,  Y02E10/52

Abstract: An optoelectronic component includes a first layer sequence being designed to emit or to detect electromagnetic radiation, and a second layer sequence being arranged at a first side of the first layer sequence and designed to reflect the electromagnetic radiation emitted or to be detected by the first layer sequence. The second layer sequence has a first reflector layer, a second reflector layer and an adhesion promoting layer. The first reflector layer contains a first material and is arranged at a first side of the second layer sequence facing the first side of the first layer sequence, the adhesion promoting layer contains a second material and is arranged at a second side of the second layer sequence facing away from the first side of the first layer sequence, and the second reflector layer contains the first material and is arranged between the first reflector layer and the adhesion promoting layer.

Abstract translation: 光电子部件包括被设计为发射或检测电磁辐射的第一层序列，以及第二层序列，被布置在第一层序列的第一侧，并被设计成反射由第一层发射或要被第一层检测的电磁辐射 序列。 第二层序列具有第一反射层，第二反射层和粘附促进层。 第一反射层包含第一材料，并且布置在面向第一层序列的第一侧的第二层序列的第一侧，粘附促进层包含第二材料，并且布置在第二层序列的第二侧 所述第二反射层包含所述第一材料并且布置在所述第一反射层和所述粘附促进层之间。

公开(公告)号：US20150255692A1

公开(公告)日：2015-09-10

申请号：US14423066

申请日：2013-08-22

Applicant: OSRAM Opto Semiconductors GmbH

Inventor： Alexander Pfeuffer

IPC: H01L33/60 ,  H01L33/54 ,  H01L33/62 ,  H01L33/00

CPC classification number: H01L33/60 ,  H01L33/005 ,  H01L33/382 ,  H01L33/405 ,  H01L33/44 ,  H01L33/54 ,  H01L33/62 ,  H01L2933/0016 ,  H01L2933/0025 ,  H01L2933/0033 ,  H01L2933/005 ,  H01L2933/0058 ,  H01L2933/0066

Abstract: A method for producing an optoelectronic semiconductor chip is disclosed. In some embodiment the method includes arranging a metallic mirror layer on a top side of a semiconductor layer sequence, arranging a mirror protection layer at least on exposed lateral surfaces of the mirror layer in a self-aligning manner, wherein the mirror layer has openings toward the semiconductor layer sequence, and wherein the openings are framed in lateral directions by the mirror protection layer and partially removing the semiconductor layer sequence in a region of the openings of the mirror layer.

Abstract translation: 公开了一种制造光电半导体芯片的方法。 在一些实施例中，该方法包括在半导体层序列的顶侧布置金属镜层，至少在自对准方式上将反射镜层的暴露侧表面布置在镜面保护层上，其中镜层具有朝向 半导体层序列，并且其中开口通过镜保护层在横向方向上成框，并且在镜层的开口的区域中部分去除半导体层序列。