公开(公告)号：US20210083160A1

公开(公告)日：2021-03-18

申请号：US16769866

申请日：2017-12-14

Applicant: OSRAM Opto Semiconductors GmbH

Inventor： Choo Kean Lim ,  Choon Keat Or ,  Siew Yan Chua ,  Choon Kim Lim

IPC: H01L33/62 ,  H01L23/00 ,  H01L33/64

Abstract: A semiconductor device and a method for producing a carrier element suitable for a semiconductor device are disclosed. In an embodiment a semiconductor device includes a carrier element including a carrier layer having a first depression extending from a first main surface of the carrier layer in a direction of a second main surface of the carrier layer opposite the first main surface and a metal substrate and an electrically insulating layer on at least a portion of the metal substrate, a first electrically conductive filling component arranged in the first depression in a form-fitting manner, the electrically insulating layer being arranged between the metal substrate and the first filling component and a semiconductor chip arranged on the carrier element, wherein the electrically insulating layer is an anodization layer.

公开(公告)号：US10854787B2

公开(公告)日：2020-12-01

申请号：US16052511

申请日：2018-08-01

Applicant: OSRAM Opto Semiconductors GmbH

Inventor： Teik Yee Wong ,  Chee Weng Soong ,  Rajah Prakash ,  Christian Betthausen ,  Chee-Eng Ooi ,  Ismail Ithnain ,  Choo Kean Lim ,  Weng Heng Chan

IPC: H01L33/48 ,  H01L33/20 ,  H01L33/46 ,  H01L33/54 ,  H01L33/56 ,  H01L33/60 ,  H01L25/075

Abstract: A component having a boundary element is disclosed. In an embodiment a component comprises a semiconductor chip, a housing and a reflective layer, wherein the housing has a shaped body and a base body, the shaped body laterally enclosing the base body at least in places and being different from the reflective layer. In a plan view, the base body has a free area which is uncovered by the shaped body. The free area or a bottom surface of a cavity comprises a mounting surface for the semiconductor chip, wherein the semiconductor chip is arranged on the mounting surface. The bottom surface or the free area is partially covered by the reflective layer, wherein the mounting surface is enclosed at least in regions by a boundary element which adjoins the reflective layer and is configured to prevent the semiconductor chip from being covered by the reflective layer.

公开(公告)号：US20200013917A1

公开(公告)日：2020-01-09

申请号：US16488068

申请日：2017-02-23

Applicant: OSRAM Opto Semiconductors GmbH

Inventor： Choon Kim Lim ,  Choo Kean Lim ,  Jeok Pheng Go

IPC: H01L31/167 ,  H01L31/0203 ,  H01L31/02

Abstract: A sensor element is disclosed. In an embodiment a sensor element includes a substrate, a light emitting semiconductor chip arranged with a mounting face on a mounting face of the substrate, wherein the semiconductor chip has a smaller mounting face than the substrate, wherein a border area of the mounting face of the substrate circumvents the semiconductor chip, wherein on a bottom side of the semiconductor chip electrical contacts are arranged, and wherein the substrate is transparent for radiation of the semiconductor chip, a carrier, wherein the bottom side of the semiconductor chip is arranged on a mounting face of the carrier, wherein the carrier includes further electrical contacts on the mounting face, and wherein the contacts of the semiconductor chip and the further contacts of the carrier are connected, a sealing member arranged between the mounting face of the carrier and the border area of the substrate, wherein the sealing member seals a sealing area between the substrate and the carrier, wherein a recess is arranged in the mounting face of the carrier, and an optical sensor arranged in the recess.

公开(公告)号：US10483446B2

公开(公告)日：2019-11-19

申请号：US15750316

申请日：2015-08-06

Applicant: OSRAM Opto Semiconductors GmbH

Inventor： Kok Eng Ng ,  Wui Chai Chew ,  Choo Kean Lim ,  Mardiana Khalid

IPC: H01L21/48 ,  H01L33/64 ,  H01L23/373 ,  H01L23/498 ,  H01L23/538 ,  H01L23/00 ,  H01L25/075 ,  H01L33/62 ,  H01L33/50

Abstract: An electronic device includes a carrier and a semiconductor chip, wherein the carrier includes a first dielectric layer and a second dielectric layer, a thermal conductivity of the first dielectric layer exceeds a thermal conductivity of the second dielectric layer, the second dielectric layer is arranged on the first dielectric layer and partially covers the first dielectric layer, the semiconductor chip is arranged on the carrier in a mounting area in which the first dielectric layer is not covered by the second dielectric layer, and the carrier includes a solder terminal for electrical contacting arranged on the second dielectric layer.

公开(公告)号：US20190044033A1

公开(公告)日：2019-02-07

申请号：US16052511

申请日：2018-08-01

Applicant: OSRAM Opto Semiconductors GmbH

Inventor： Teik Yee Wong ,  Chee Weng Soong ,  Rajah Prakash ,  Christian Betthausen ,  Chee-Eng Ooi ,  Ismail Ithnain ,  Choo Kean Lim ,  Weng Heng Chan

IPC: H01L33/48 ,  H01L33/56 ,  H01L33/60 ,  H01L33/46 ,  H01L33/20 ,  H01L33/54

Abstract: A component having a boundary element is disclosed. In an embodiment a component comprises a semiconductor chip, a housing and a reflective layer, wherein the housing has a shaped body and a base body, the shaped body laterally enclosing the base body at least in places and being different from the reflective layer. In a plan view, the base body has a free area which is uncovered by the shaped body. The free area or a bottom surface of a cavity comprises a mounting surface for the semiconductor chip, wherein the semiconductor chip is arranged on the mounting surface. The bottom surface or the free area is partially covered by the reflective layer, wherein the mounting surface is enclosed at least in regions by a boundary element which adjoins the reflective layer and is configured to prevent the semiconductor chip from being covered by the reflective layer.