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公开(公告)号:US09721937B1
公开(公告)日:2017-08-01
申请号:US15473537
申请日:2017-03-29
Applicant: PDF Solutions, Inc.
Inventor: Stephen Lam , Dennis Ciplickas , Tomasz Brozek , Jeremy Cheng , Simone Comensoli , Indranil De , Kelvin Doong , Hans Eisenmann , Timothy Fiscus , Jonathan Haigh , Christopher Hess , John Kibarian , Sherry Lee , Marci Liao , Sheng-Che Lin , Hideki Matsuhashi , Kimon Michaels , Conor O'Sullivan , Markus Rauscher , Vyacheslav Rovner , Andrzej Strojwas , Marcin Strojwas , Carl Taylor , Rakesh Vallishayee , Larg Weiland , Nobuharu Yokoyama
IPC: H01L29/00 , H01L27/02 , H01L29/45 , H01L23/522 , H01L23/528 , H01L21/66 , H01L21/8234 , H01L27/088 , G06F11/07 , G06F17/50 , H01L29/06
CPC classification number: H01L22/20 , G01R31/303 , G06F11/079 , G06F17/5045 , G06F17/5068 , G06F17/5072 , G06F17/5081 , G06F2217/06 , H01L21/823437 , H01L21/823475 , H01L22/26 , H01L22/32 , H01L22/34 , H01L23/5226 , H01L23/528 , H01L27/0207 , H01L27/088 , H01L27/11803 , H01L27/11807 , H01L28/00 , H01L29/0649 , H01L29/0684 , H01L29/0847 , H01L29/41725 , H01L29/45 , H01L2027/11866 , H01L2027/11875 , H01L2027/11888
Abstract: An IC includes first and second designs of experiments (DOEs), each comprised of at least two fill cells. The fill cells contain structures configured to obtain in-line data via non-contact electrical measurements (“NCEM”). The first DOE contains fill cells configured to enable non-contact (NC) detection of side-to-side shorts, and the second DOE contains fill cells configured to enable NC detection of tip-to-tip shorts.
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公开(公告)号:US09627370B1
公开(公告)日:2017-04-18
申请号:US15391001
申请日:2016-12-27
Applicant: PDF Solutions, Inc.
Inventor: Stephen Lam , Dennis Ciplickas , Tomasz Brozek , Jeremy Cheng , Simone Comensoli , Indranil De , Kelvin Doong , Hans Eisenmann , Timothy Fiscus , Jonathan Haigh , Christopher Hess , John Kibarian , Sherry Lee , Marci Liao , Sheng-Che Lin , Hideki Matsuhashi , Kimon Michaels , Conor O'Sullivan , Markus Rauscher , Vyacheslav Rovner , Andrzej Strojwas , Marcin Strojwas , Carl Taylor , Rakesh Vallishayee , Larg Weiland , Nobuharu Yokoyama
IPC: H01L23/58 , H01L29/76 , H01L27/02 , H01L21/66 , H01L29/417 , H01L29/06 , H01L23/528
CPC classification number: G06F11/079 , G06F17/5045 , G06F17/5068 , G06F17/5072 , G06F17/5081 , H01L21/823437 , H01L21/823475 , H01L22/20 , H01L22/26 , H01L22/32 , H01L22/34 , H01L23/5226 , H01L23/528 , H01L27/0207 , H01L27/088 , H01L27/092 , H01L29/0649 , H01L29/0684 , H01L29/41725 , H01L29/45
Abstract: An IC includes logic cells, selected from a standard cell library, and fill cells, configured for compatibility with the standard logic cells. The fill cells contain structures configured to obtain in-line data via non-contact electrical measurements (“NCEM”). The IC includes such NCEM-enabled fill cells configured to enable detection and/or measurement of a variety of open-circuit and short-circuit failure modes, including at least one via-open-related failure mode, one GATE-short-related failure mode, one GATECNT-short-related failure mode, and one TS-short-related failure mode.
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公开(公告)号:US11107804B1
公开(公告)日:2021-08-31
申请号:US16458095
申请日:2019-06-30
Applicant: PDF Solutions, Inc.
Inventor: Stephen Lam , Dennis Ciplickas , Tomasz Brozek , Jeremy Cheng , Simone Comensoli , Indranil De , Kelvin Doong , Hans Eisenmann , Timothy Fiscus , Jonathan Haigh , Christopher Hess , John Kibarian , Sherry Lee , Marci Liao , Sheng-Che Lin , Hideki Matsuhashi , Kimon Michaels , Conor O'Sullivan , Markus Rauscher , Vyacheslav Rovner , Andrzej Strojwas , Marcin Strojwas , Carl Taylor , Rakesh Vallishayee , Larg Weiland , Nobuharu Yokoyama , Matthew Moe
IPC: H01L21/66 , H01L27/02 , H01L23/528 , H01L27/088 , H01L23/522 , H01L21/3213 , H01L29/08 , H01L29/45 , H01L21/8234 , H01J37/26 , H03K19/0944 , G01R31/28 , G06F30/39
Abstract: An IC that includes a contiguous standard cell area with a 4x3 e-beam pad that is compatible with advanced manufacturing processes and an associated e-beam testable structure.
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公开(公告)号:US10380305B1
公开(公告)日:2019-08-13
申请号:US15273545
申请日:2016-09-22
Applicant: PDF Solutions, Inc.
Inventor: Yih-Yuh Doong , Sheng-Che Lin , Chia-Chi Lin , Hans Eisenmann , Cho-Si Huang , Tzupin Shen , Christopher Hess , Kimon Michaels
Abstract: A method is disclosed for designing a test vehicle utilizing a layout of a real integrated circuit (IC) product. The method comprises: importing an original full-chip layout of the real IC product; partitioning the original full-chip layout into probe groups, each probe group comprising probe pads, and, a plurality of IC devices within an area of interest (AOI) having original routing interconnect for those IC devices; selecting a set of IC devices within the AOI; and, for the selected set of IC devices, using pattern extraction to remove the original routing interconnect, and create customized interconnect layers (CIL) to reconfigure connection between the individual IC devices. Incorporating the selected set of IC devices with the CIL into the original full-chip layout creates a modified full-chip layout such that a wafer fabricated using the modified full-chip layout comprises a real product with a built-in test vehicle.
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公开(公告)号:US10199289B1
公开(公告)日:2019-02-05
申请号:US15942485
申请日:2018-03-31
Applicant: PDF Solutions, Inc.
Inventor: Stephen Lam , Dennis Ciplickas , Tomasz Brozek , Jeremy Cheng , Simone Comensoli , Indranil De , Kelvin Doong , Hans Eisenmann , Timothy Fiscus , Jonathan Haigh , Christopher Hess , John Kibarian , Sherry Lee , Marci Liao , Sheng-Che Lin , Hideki Matsuhashi , Kimon Michaels , Conor O'Sullivan , Markus Rauscher , Vyacheslav Rovner , Andrzej Strojwas , Marcin Strojwas , Carl Taylor , Rakesh Vallishayee , Larg Weiland , Nobuharu Yokoyama
IPC: H01L23/58 , H01L21/66 , H01L23/528
Abstract: A method for processing a semiconductor wafer uses non-contact electrical measurements indicative of at least one chamfer short or leakage, at least one corner short or leakage, and at least one via open or resistance, where such measurements are obtained from non-contact pads associated with respective chamfer short, corner short, and via open test areas.
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公开(公告)号:US10199287B1
公开(公告)日:2019-02-05
申请号:US15942473
申请日:2018-03-31
Applicant: PDF Solutions, Inc.
Inventor: Stephen Lam , Dennis Ciplickas , Tomasz Brozek , Jeremy Cheng , Simone Comensoli , Indranil De , Kelvin Doong , Hans Eisenmann , Timothy Fiscus , Jonathan Haigh , Christopher Hess , John Kibarian , Sherry Lee , Marci Liao , Sheng-Che Lin , Hideki Matsuhashi , Kimon Michaels , Conor O'Sullivan , Markus Rauscher , Vyacheslav Rovner , Andrzej Strojwas , Marcin Strojwas , Carl Taylor , Rakesh Vallishayee , Larg Weiland , Nobuharu Yokoyama
IPC: H01L29/00 , H01L21/66 , H01L27/118 , H01L29/417 , H01L27/02 , H01L23/528 , G06F11/07 , G06F17/50 , H01L29/06
Abstract: A method for processing a semiconductor wafer uses non-contact electrical measurements indicative of at least one tip-to-side short or leakage, at least one chamfer short or leakage, and at least one via open or resistance, where such measurements are obtained from non-contact pads associated with respective tip-to-side short, chamfer short, and via open test areas.
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17.
公开(公告)号:US09984944B1
公开(公告)日:2018-05-29
申请号:US15197836
申请日:2016-06-30
Applicant: PDF Solutions, Inc.
Inventor: Stephen Lam , Dennis Ciplickas , Tomasz Brozek , Jeremy Cheng , Simone Comensoli , Indranil De , Kelvin Doong , Hans Eisenmann , Timothy Fiscus , Jonathan Haigh , Christopher Hess , John Kibarian , Sherry Lee , Marci Liao , Sheng-Che Lin , Hideki Matsuhashi , Kimon Michaels , Conor O'Sullivan , Markus Rauscher , Vyacheslav Rovner , Andrzej Strojwas , Marcin Strojwas , Carl Taylor , Rakesh Vallishayee , Larg Weiland , Nobuharu Yokoyama
CPC classification number: H01L22/26 , G01R31/2884 , G06F11/079 , G06F17/5045 , G06F17/5068 , G06F17/5072 , G06F17/5081 , H01L22/20 , H01L22/34 , H01L23/5226 , H01L23/528 , H01L27/0207 , H01L27/11803 , H01L27/11807 , H01L29/0649 , H01L29/0684 , H01L29/41725 , H01L29/45 , H01L2027/11866 , H01L2027/11875 , H01L2027/11885 , H01L2027/11887
Abstract: Wafers, chips, or dies that contain fill cells with structures configured to obtain in-line data via non-contact electrical measurements (“NCEM”). Such NCEM-enabled fill cells may target/expose a variety of open-circuit, short-circuit, leakage, or excessive resistance failure modes, including GATECNT-tip-to-side-short and/or GATECNT-tip-to-side-leakage failure modes. Such wafers, chips, or dies may include Designs of Experiments (“DOEs”), comprised of multiple NCEM-enabled fill cells, of at least two types, all targeted to the same failure mode.
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公开(公告)号:US09911669B1
公开(公告)日:2018-03-06
申请号:US15719604
申请日:2017-09-29
Applicant: PDF Solutions, Inc.
Inventor: Stephen Lam , Dennis Ciplickas , Tomasz Brozek , Jeremy Cheng , Simone Comensoli , Indranil De , Kelvin Doong , Hans Eisenmann , Timothy Fiscus , Jonathan Haigh , Christopher Hess , John Kibarian , Sherry Lee , Marci Liao , Sheng-Che Lin , Hideki Matsuhashi , Kimon Michaels , Conor O'Sullivan , Markus Rauscher , Vyacheslav Rovner , Andrzej Strojwas , Marcin Strojwas , Carl Taylor , Rakesh Vallishayee , Larg Weiland , Nobuharu Yokoyama
IPC: H01L29/00 , H01L21/66 , H01L27/118 , H01L29/417 , H01L27/02 , H01L23/528 , G06F11/07 , G06F17/50 , H01L29/06
CPC classification number: H01L22/20 , G01R31/303 , G06F11/079 , G06F17/5045 , G06F17/5068 , G06F17/5072 , G06F17/5081 , G06F2217/06 , H01L21/823437 , H01L21/823475 , H01L22/26 , H01L22/32 , H01L22/34 , H01L23/5226 , H01L23/528 , H01L27/0207 , H01L27/088 , H01L27/11803 , H01L27/11807 , H01L28/00 , H01L29/0649 , H01L29/0684 , H01L29/0847 , H01L29/41725 , H01L29/45 , H01L2027/11866 , H01L2027/11875 , H01L2027/11888
Abstract: An integrated circuit, in the form of a wafer, die, or chip, includes multiple standard cell-compatible fill cells, configured to enable non-contact electrical measurements. Such fill cells include mesh pads that contain at least three conductive stripes disposed between adjacent gate stripes. Such fill cells further include geometry to enable non-contact evaluation of diagonal shorts and/or leakages.
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公开(公告)号:US09911668B1
公开(公告)日:2018-03-06
申请号:US15719595
申请日:2017-09-29
Applicant: PDF Solutions, Inc.
Inventor: Stephen Lam , Dennis Ciplickas , Tomasz Brozek , Jeremy Cheng , Simone Comensoli , Indranil De , Kelvin Doong , Hans Eisenmann , Timothy Fiscus , Jonathan Haigh , Christopher Hess , John Kibarian , Sherry Lee , Marci Liao , Sheng-Che Lin , Hideki Matsuhashi , Kimon Michaels , Conor O'Sullivan , Markus Rauscher , Vyacheslav Rovner , Andrzej Strojwas , Marcin Strojwas , Carl Taylor , Rakesh Vallishayee , Larg Weiland , Nobuharu Yokoyama
IPC: H01L21/66 , H01L27/118 , H01L29/417 , H01L27/02 , H01L23/528 , G06F11/07 , G06F17/50 , H01L29/06
CPC classification number: H01L22/20 , G01R31/303 , G06F11/079 , G06F17/5045 , G06F17/5068 , G06F17/5072 , G06F17/5081 , G06F2217/06 , H01L21/823437 , H01L21/823475 , H01L22/26 , H01L22/32 , H01L22/34 , H01L23/5226 , H01L23/528 , H01L27/0207 , H01L27/088 , H01L27/11803 , H01L27/11807 , H01L28/00 , H01L29/0649 , H01L29/0684 , H01L29/0847 , H01L29/41725 , H01L29/45 , H01L2027/11866 , H01L2027/11875 , H01L2027/11888
Abstract: An integrated circuit, in the form of a wafer, die, or chip, includes multiple standard cell-compatible fill cells, configured to enable non-contact electrical measurements. Such fill cells include mesh pads that contain at least three conductive stripes disposed between adjacent gate stripes. Such fill cells further include geometry to enable non-contact evaluation of corner shorts and/or leakages.
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公开(公告)号:US09899276B1
公开(公告)日:2018-02-20
申请号:US15721890
申请日:2017-09-30
Applicant: PDF Solutions, Inc.
Inventor: Stephen Lam , Dennis Ciplickas , Tomasz Brozek , Jeremy Cheng , Simone Comensoli , Indranil De , Kelvin Doong , Hans Eisenmann , Timothy Fiscus , Jonathan Haigh , Christopher Hess , John Kibarian , Sherry Lee , Marci Liao , Sheng-Che Lin , Hideki Matsuhashi , Kimon Michaels , Conor O'Sullivan , Markus Rauscher , Vyacheslav Rovner , Andrzej Strojwas , Marcin Strojwas , Carl Taylor , Rakesh Vallishayee , Larg Weiland , Nobuharu Yokoyama
IPC: H01L21/66 , H01L27/118 , H01L29/417 , H01L27/02 , H01L23/528 , G06F11/07 , G06F17/50 , H01L29/06
CPC classification number: H01L22/20 , G01R31/303 , G06F11/079 , G06F17/5045 , G06F17/5068 , G06F17/5072 , G06F17/5081 , G06F2217/06 , H01L21/823437 , H01L21/823475 , H01L22/26 , H01L22/32 , H01L22/34 , H01L23/5226 , H01L23/528 , H01L27/0207 , H01L27/088 , H01L27/11803 , H01L27/11807 , H01L28/00 , H01L29/0649 , H01L29/0684 , H01L29/0847 , H01L29/41725 , H01L29/45 , H01L2027/11866 , H01L2027/11875 , H01L2027/11888
Abstract: A process for making an integrated circuit, either in the form of a wafer, die, or chip, includes instantiating multiple standard cell-compatible fill cells, configured to enable non-contact electrical measurements. Such instantiated fill cells include mesh pads that contain at least three conductive stripes disposed between adjacent gate stripes. Such instantiated fill cells further include geometry to enable non-contact evaluation of interlayer overlap shorts and/or leakages.
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