公开(公告)号：US07453280B1

公开(公告)日：2008-11-18

申请号：US11896364

申请日：2007-08-31

申请人： Sheng-Hui Liang ,  Chia-Lin Chen ,  Pei-Chun Liao ,  Chin-Yuan Ko

发明人： Sheng-Hui Liang ,  Chia-Lin Chen ,  Pei-Chun Liao ,  Chin-Yuan Ko

IPC分类号： G01R31/26 ,  G01R31/28

CPC分类号： G01R31/2623 ,  G01R31/2831 ,  G01R31/2894 ,  G11C11/41 ,  G11C29/006 ,  G11C29/50 ,  G11C2029/0403 ,  G11C2029/5002 ,  G11C2029/5006

摘要： A method for testing a batch of semiconductor devices in wafer level is provided. The method includes the following steps: (a) obtaining a breakdown voltage of gate dielectric of each semiconductor device; (b) applying, to the gate dielectric of each semiconductor device, a stress voltage below the breakdown voltage but above a base voltage of gate dielectric of the semiconductor devices; (c) after the step (b), measuring currents of gate dielectric of each semiconductor devices at the base voltage; and (d) obtaining a tailing distribution from the measured currents.

摘要翻译： 提供了一种用于测试晶片级的一批半导体器件的方法。 该方法包括以下步骤：（a）获得每个半导体器件的栅极电介质的击穿电压; （b）向每个半导体器件的栅极电介质施加低于击穿电压但高于半导体器件的栅极电介质的基极电压的应力电压; （c）在步骤（b）之后，测量每个半导体器件在基极电压下的栅极电介质的电流; 和（d）从测量的电流获得拖尾分布。

公开(公告)号：US09158164B2

公开(公告)日：2015-10-13

申请号：US13301783

申请日：2011-11-22

申请人： Chin-An Tseng ,  Sheng-Ju Ho ,  Tien-Lun Ting ,  Cheng-Han Tsao ,  Ming-Yung Huang ,  Yen-Heng Huang ,  Pei-Chun Liao ,  Wen-Hao Hsu

发明人： Chin-An Tseng ,  Sheng-Ju Ho ,  Tien-Lun Ting ,  Cheng-Han Tsao ,  Ming-Yung Huang ,  Yen-Heng Huang ,  Pei-Chun Liao ,  Wen-Hao Hsu

IPC分类号： G02F1/1362 ,  G02F1/1343 ,  G02F1/1335 ,  G09G3/00 ,  G09G3/36 ,  G02B27/26

CPC分类号： G02F1/134336 ,  G02B27/26 ,  G02F1/133512 ,  G02F1/13624 ,  G02F2001/134345 ,  G09G3/003 ,  G09G3/3659 ,  G09G2300/0443 ,  G09G2300/0809

摘要： A pixel array substrate and a display panel are provided. The pixel array substrate includes a substrate, scan line groups, data lines, and pixel structures. The scan line groups are disposed on the substrate. The data lines are intersected with the scan line groups. The pixel structures are connected to the scan line groups and the data lines. Each pixel structure includes an active device group, a first pixel electrode, a second pixel electrode, and a connection electrode. The first pixel electrode is located between the second pixel electrode and the nth scan line group. The connection electrode is located at a side of the first pixel electrode adjacent to one data line. The second pixel electrode is electrically connected to the active device group through the connection electrode. The connection electrode, the first pixel electrode, and the second pixel electrode are of the same layer.

摘要翻译： 提供像素阵列基板和显示面板。 像素阵列基板包括基板，扫描线组，数据线和像素结构。 扫描线组设置在基板上。 数据线与扫描线组相交。 像素结构连接到扫描线组和数据线。 每个像素结构包括有源器件组，第一像素电极，第二像素电极和连接电极。 第一像素电极位于第二像素电极和第n扫描线组之间。 连接电极位于与一条数据线相邻的第一像素电极的一侧。 第二像素电极通过连接电极与有源器件组电连接。 连接电极，第一像素电极和第二像素电极具有相同的层。

公开(公告)号：US08194021B2

公开(公告)日：2012-06-05

申请号：US12188577

申请日：2008-08-08

申请人： Pei-Chun Liao ,  Hung-Lung Hou

发明人： Pei-Chun Liao ,  Hung-Lung Hou

IPC分类号： G09G3/36 ,  G02F1/136

CPC分类号： G09G3/3659 ,  G09G3/3607 ,  G09G3/3614 ,  G09G2310/0205 ,  G09G2320/028

摘要： A display apparatus, pixel structure and drive method thereof are provided. The display apparatus comprises a gate drive chip, a first gate line, a second gate line, a first pixel unit, and a second pixel unit. The gate driver is configured to generate a first gate drive signal and a second gate drive signal. The first and second gate drive signals are outputted to the first and second gate lines, respectively. Furthermore, the first and second gate drive signals are configured to adjust a first feed through (FT) voltage generated by a first pixel area of the first pixel unit, a second FT voltage generated by a second pixel area of the first pixel unit, a third FT voltage generated by a third pixel area of the second pixel unit, and a fourth FT voltage generated by a fourth pixel area of the second pixel unit.

摘要翻译： 提供了一种显示装置，像素结构及其驱动方法。 显示装置包括栅极驱动芯片，第一栅极线，第二栅极线，第一像素单元和第二像素单元。 栅极驱动器被配置为产生第一栅极驱动信号和第二栅极驱动信号。 第一和第二栅极驱动信号分别输出到第一和第二栅极线。 此外，第一和第二栅极驱动信号被配置为调整由第一像素单元的第一像素区域产生的第一馈通（FT）电压，由第一像素单元的第二像素区域产生的第二FT电压， 由第二像素单元的第三像素区域产生的第三FT电压和由第二像素单元的第四像素区域产生的第四FT电压。

公开(公告)号：US20090295695A1

公开(公告)日：2009-12-03

申请号：US12188577

申请日：2008-08-08

申请人： Pei-Chun Liao ,  Hung-Lung Hou

发明人： Pei-Chun Liao ,  Hung-Lung Hou

IPC分类号： G09G3/36

CPC分类号： G09G3/3659 ,  G09G3/3607 ,  G09G3/3614 ,  G09G2310/0205 ,  G09G2320/028

摘要： A display apparatus, pixel structure and drive method thereof are provided. The display apparatus comprises a gate drive chip, a first gate line, a second gate line, a first pixel unit, and a second pixel unit. The gate driver is configured to generate a first gate drive signal and a second gate drive signal. The first and second gate drive signals are outputted to the first and second gate lines, respectively. Furthermore, the first and second gate drive signals are configured to adjust a first feed through (FT) voltage generated by a first pixel area of the first pixel unit, a second FT voltage generated by a second pixel area of the first pixel unit, a third FT voltage generated by a first pixel area of the second pixel unit, and a fourth FT voltage generated by a second pixel area of the second pixel unit.

摘要翻译： 提供了一种显示装置，像素结构及其驱动方法。 显示装置包括栅极驱动芯片，第一栅极线，第二栅极线，第一像素单元和第二像素单元。 栅极驱动器被配置为产生第一栅极驱动信号和第二栅极驱动信号。 第一和第二栅极驱动信号分别输出到第一和第二栅极线。 此外，第一和第二栅极驱动信号被配置为调整由第一像素单元的第一像素区域产生的第一馈通（FT）电压，由第一像素单元的第二像素区域产生的第二FT电压， 由第二像素单元的第一像素区域产生的第三FT电压和由第二像素单元的第二像素区域产生的第四FT电压。

公开(公告)号：US20090195720A1

公开(公告)日：2009-08-06

申请号：US12233611

申请日：2008-09-19

申请人： Yu-Hui Chou ,  Pei-Chun Liao ,  Hsueh-Ying Huang

发明人： Yu-Hui Chou ,  Pei-Chun Liao ,  Hsueh-Ying Huang

IPC分类号： G02F1/1343 ,  H01L27/088

CPC分类号： G02F1/136286 ,  G02F1/13624 ,  G02F2001/13606 ,  G02F2001/136218 ,  H01L27/124

摘要： A thin film transistor (TFT) array substrate including a substrate, a plurality of scan lines disposed on the substrate, a plurality of data lines disposed on the substrate, and a plurality of pixels arranged in array on the substrate is provided. Each scan line is connected to a row of pixels. Each pixel includes a TFT and a pixel electrode, wherein the pixel electrode is connected to one of the scan lines and one of the data lines through the TFT. In the same column of pixels, the TFTs are connected to two adjacent data lines alternatively and aligned in the column direction. At least one of the pixels further includes a capacitance compensating line. In the pixel having the capacitance compensating line, the TFT is connected to one of the adjacent two data lines, and the capacitance compensating line is connected to the other one.

摘要翻译： 提供一种薄膜晶体管（TFT）阵列基板，其包括基板，设置在基板上的多条扫描线，设置在基板上的多条数据线，以及阵列上布置在基板上的多个像素。 每条扫描线连接到一行像素。 每个像素包括TFT和像素电极，其中像素电极通过TFT连接到扫描线之一和数据线之一。 在同一列像素中，TFT交替地连接到两个相邻的数据线，并且在列方向上对齐。 像素中的至少一个还包括电容补偿线。 在具有电容补偿线的像素中，TFT连接到相邻的两条数据线之一，并且电容补偿线连接到另一条数据线。

公开(公告)号：US08305539B2

公开(公告)日：2012-11-06

申请号：US12213252

申请日：2008-06-17

申请人： Ting-Wei Su ,  Pei-Chun Liao ,  Hung-Lung Hou

发明人： Ting-Wei Su ,  Pei-Chun Liao ,  Hung-Lung Hou

IPC分类号： G02F1/1343 ,  G02F1/136

CPC分类号： G02F1/134336 ,  G02F1/133707 ,  G02F1/13624 ,  G02F2001/134345 ,  G09G3/3614 ,  G09G3/3648 ,  G09G2300/0443 ,  G09G2320/0209

摘要： A pixel structure of liquid crystal display including a first and a second sub-pixel electrodes, a first and a second data lines, a gate line, and a first and a second transistors is provided. The first and the second sub-pixel electrodes disposed in the first and second sub-pixel areas respectively include at least two display domains at left and right. The first data line is disposed under the interface between two domains of each of the first and second sub-pixel electrodes, and the second data line is disposed under the edges of the first and second sub-pixel electrodes. The gate line is disposed between the first and second sub-pixel areas. The first sub-pixel electrode is controlled by the gate line and the first data line through the first transistor. The second sub-pixel electrode is controlled by the gate line and the second data line through the second transistor.

摘要翻译： 提供包括第一和第二子像素电极，第一和第二数据线，栅极线以及第一和第二晶体管的液晶显示器的像素结构。 设置在第一子像素区域和第二子像素区域中的第一子像素电极和第二子像素电极分别在左侧和右侧包括至少两个显示域。 第一数据线设置在第一和第二子像素电极中的每一个的两个畴之间的界面下方，并且第二数据线设置在第一和第二子像素电极的边缘下方。 栅极线设置在第一和第二子像素区域之间。 第一子像素电极由栅极线和第一数据线通过第一晶体管控制。 第二子像素电极由栅极线和第二数据线通过第二晶体管控制。

公开(公告)号：US08179487B2

公开(公告)日：2012-05-15

申请号：US12233611

申请日：2008-09-19

申请人： Yu-Hui Chou ,  Pei-Chun Liao ,  Hsueh-Ying Huang

发明人： Yu-Hui Chou ,  Pei-Chun Liao ,  Hsueh-Ying Huang

IPC分类号： G02F1/1343 ,  G02F1/1333

CPC分类号： G02F1/136286 ,  G02F1/13624 ,  G02F2001/13606 ,  G02F2001/136218 ,  H01L27/124

摘要： A thin film transistor (TFT) array substrate including a substrate, a plurality of scan lines disposed on the substrate, a plurality of data lines disposed on the substrate, and a plurality of pixels arranged in array on the substrate is provided. Each scan line is connected to a row of pixels. Each pixel includes a TFT and a pixel electrode, wherein the pixel electrode is connected to one of the scan lines and one of the data lines through the TFT. In the same column of pixels, the TFTs are connected to two adjacent data lines alternatively and aligned in the column direction. At least one of the pixels further includes a capacitance compensating line. In the pixel having the capacitance compensating line, the TFT is connected to one of the adjacent two data lines, and the capacitance compensating line is connected to the other one.

摘要翻译： 提供一种薄膜晶体管（TFT）阵列基板，其包括基板，设置在基板上的多条扫描线，设置在基板上的多条数据线，以及阵列上布置在基板上的多个像素。 每条扫描线连接到一行像素。 每个像素包括TFT和像素电极，其中像素电极通过TFT连接到扫描线之一和数据线之一。 在同一列像素中，TFT交替地连接到两个相邻的数据线，并且在列方向上对齐。 像素中的至少一个还包括电容补偿线。 在具有电容补偿线的像素中，TFT连接到相邻的两条数据线之一，并且电容补偿线连接到另一条数据线。

公开(公告)号：US08711075B2

公开(公告)日：2014-04-29

申请号：US12252496

申请日：2008-10-16

申请人： Pei-Chun Liao ,  Hung-Lung Hou ,  Ting-Wei Su

发明人： Pei-Chun Liao ,  Hung-Lung Hou ,  Ting-Wei Su

IPC分类号： G09G3/36 ,  G09G5/02 ,  G02F1/1343

CPC分类号： G02F1/13624 ,  G02F2001/134345 ,  G09G3/3607 ,  G09G3/3648 ,  G09G2300/0426 ,  G09G2320/028

摘要： A liquid crystal display includes first and second pixel electrodes, first to fourth data lines, and a first gate line. The first pixel electrode has separated first primary and secondary sub-pixel electrodes. The second pixel electrode has separated second primary and secondary sub-pixel electrodes. The first data line is coupled to the first secondary sub-pixel electrode and covered by the first pixel electrode. The second data line is coupled to the first primary sub-pixel electrode and covered by the second pixel electrode. The third data line is coupled to the second primary sub-pixel electrode and covered by the second pixel electrode. The fourth data line is coupled to the second secondary sub-pixel electrode. The first gate line is coupled to the first pixel electrode and the second pixel electrode.

摘要翻译： 液晶显示器包括第一和第二像素电极，第一至第四数据线和第一栅极线。 第一像素电极已经分离出第一初级和次级子像素电极。 第二像素电极具有分离的第二初级和次级子像素电极。 第一数据线耦合到第一辅助子像素电极并被第一像素电极覆盖。 第二数据线耦合到第一主要子像素电极并被第二像素电极覆盖。 第三数据线耦合到第二主子像素电极并被第二像素电极覆盖。 第四数据线耦合到第二辅助子像素电极。 第一栅极线耦合到第一像素电极和第二像素电极。

公开(公告)号：US20130002625A1

公开(公告)日：2013-01-03

申请号：US13287114

申请日：2011-11-01

申请人： Pei-Chun Liao ,  Wen-Hao Hsu ,  Hui-Jun Wang

发明人： Pei-Chun Liao ,  Wen-Hao Hsu ,  Hui-Jun Wang

IPC分类号： G06F3/038 ,  G09G3/36

CPC分类号： G02F1/134309 ,  G02F1/133345 ,  G02F1/13624 ,  G02F2001/134345 ,  G02F2201/40

摘要： A pixel structure includes a scan line, a data line, a driving device, a first pixel electrode, an insulating layer and a second pixel electrode. The driving device is electrically connected to the scan line and the data line. The first pixel electrode is electrically connected to the driving device. The insulating layer covers the first pixel electrode. The second pixel electrode is disposed on the insulating layer. The second pixel electrode is electrically connected to the driving device and is not directly connected to or not contacted with the first pixel electrode.

摘要翻译： 像素结构包括扫描线，数据线，驱动装置，第一像素电极，绝缘层和第二像素电极。 驱动装置电连接到扫描线和数据线。 第一像素电极电连接到驱动装置。 绝缘层覆盖第一像素电极。 第二像素电极设置在绝缘层上。 第二像素电极电连接到驱动装置，并且不直接连接到第一像素电极或不与第一像素电极接触。

公开(公告)号：US20120320028A1

公开(公告)日：2012-12-20

申请号：US13593685

申请日：2012-08-24

申请人： Ting-Wei Su ,  Pei-Chun Liao ,  Hung-Lung Hou

发明人： Ting-Wei Su ,  Pei-Chun Liao ,  Hung-Lung Hou

IPC分类号： G09G3/36 ,  G06F3/038

CPC分类号： G02F1/134336 ,  G02F1/133707 ,  G02F1/13624 ,  G02F2001/134345 ,  G09G3/3614 ,  G09G3/3648 ,  G09G2300/0443 ,  G09G2320/0209

摘要： A pixel structure of liquid crystal display includes a first and a second sub-pixel electrodes, a first and a second data lines, a gate line, and a first and a second transistors. The first and the second sub-pixel electrodes disposed in the first and second sub-pixel areas respectively include at least two display domains at left and right. The first data line is disposed under the interface between two domains of each of the first and second sub-pixel electrodes, and the second data line is disposed under the edges of the first and second sub-pixel electrodes. The gate line is disposed between the first and second sub-pixel areas. The first sub-pixel electrode is controlled by the gate line and the first data line through the first transistor. The second sub-pixel electrode is controlled by the gate line and the second data line through the second transistor.

摘要翻译： 液晶显示器的像素结构包括第一和第二子像素电极，第一和第二数据线，栅极线以及第一和第二晶体管。 设置在第一子像素区域和第二子像素区域中的第一子像素电极和第二子像素电极分别在左侧和右侧包括至少两个显示域。 第一数据线设置在第一和第二子像素电极中的每一个的两个畴之间的界面下方，并且第二数据线设置在第一和第二子像素电极的边缘下方。 栅极线设置在第一和第二子像素区域之间。 第一子像素电极由栅极线和第一数据线通过第一晶体管控制。 第二子像素电极由栅极线和第二数据线通过第二晶体管控制。