公开(公告)号：US20180091130A1

公开(公告)日：2018-03-29

申请号：US15663728

申请日：2017-07-29

Applicant: Renesas Electronics Corporation

Inventor： Akira TANABE

IPC: H03K17/041 ,  H03K17/10

CPC classification number: H03K17/04106 ,  H03K17/04123 ,  H03K17/102 ,  H03K2217/0018

Abstract: Related-art back bias generation circuits cause a problem where a long time is required for transition between an operating state and a standby state because driving power is lowered to reduce the power consumption in the standby state. A back bias generation circuit outputs a predetermined voltage. The predetermined voltage is the back bias voltage of a substrate in a standby mode. A bias control circuit stores an electrical charge while a circuit block is in an operating mode, supplies the stored electrical charge to the substrate of a MOSFET included in the circuit block when the circuit block transitions from the operating mode to the standby mode, and subsequently supplies the output of the back bias generation circuit to the substrate of the MOSFET.

公开(公告)号：US20210116951A1

公开(公告)日：2021-04-22

申请号：US17068476

申请日：2020-10-12

Applicant: RENESAS ELECTRONICS CORPORATION

Inventor： Akira TANABE ,  Kazuya UEJIMA

IPC: G05F1/44 ,  H01L27/092 ,  G01R31/40

Abstract: An electronic system device comprises a power generation device generating a power supply voltage, a substrate bias generation circuit connected to the power generation device, a memory circuit, a monitor circuit, and a capacitor connected to the substrate bias generation circuit via a switch. The substrate bias generation circuit generates a substrate bias voltage from the power supply voltage and supplies charges based on the substrate bias voltage to the capacitor while the switch is ON-state. While the switch is OFF-state, the capacitor stores the accumulated charges based on the substrate bias voltage. While the switch is ON-state, the substrate bias generation circuit adds based on the substrate bias voltage to charge that was held, and states the back bias voltage. The substrate bias generation circuit supplies the back bias voltage to memory circuit.

公开(公告)号：US20160141030A1

公开(公告)日：2016-05-19

申请号：US14945321

申请日：2015-11-18

Applicant: Renesas Electronics Corporation

Inventor： Kiyoshi TAKEUCHI ,  Akira TANABE ,  Kenzo MANABE

IPC: G11C13/00

CPC classification number: G11C13/0069 ,  G11C13/0007 ,  G11C13/0035 ,  G11C13/004 ,  G11C13/0061 ,  G11C13/0064 ,  G11C2013/0073 ,  G11C2013/0076 ,  G11C2013/0092 ,  G11C2213/79 ,  G11C2213/82

Abstract: A semiconductor memory device has at least one memory cell using a resistance variable element, and a control circuit which controls writing to and reading from the memory cell. Operations by the control circuit include a first writing operation, a second writing operation, and a rewriting operation. The first writing operation is a writing operation for applying a first voltage of a first polarity to the memory cell. The second writing operation is a writing operation for applying a second voltage of a second polarity opposite to the first polarity to the memory cell. The rewriting operation is a writing operation for, when the first writing operation fails, further executing a second A writing operation for applying the second voltage of the second polarity to the memory cell and a first A writing operation for applying the first voltage of the first polarity to the memory cell.

Abstract translation: 半导体存储器件具有使用电阻可变元件的至少一个存储单元，以及控制对存储单元写入和读取的控制电路。 由控制电路进行的操作包括第一写入操作，第二写入操作和重写操作。 第一写入操作是用于将第一极性的第一电压施加到存储器单元的写入操作。 第二写入操作是将与第一极性相反的第二极性的第二电压施加到存储单元的写入操作。 重写操作是写入操作，当第一写入操作失败时，进一步执行用于将第二极性的第二电压施加到存储单元的第二A写入操作，以及用于施加第一写入操作的第一电压的第一A写入操作 极性到存储单元。

公开(公告)号：US20160124012A1

公开(公告)日：2016-05-05

申请号：US14991508

申请日：2016-01-08

Applicant: RENESAS ELECTRONICS CORPORATION

Inventor： Akira TANABE

IPC: G01P15/08

CPC classification number: G01P15/0897 ,  G01P15/008

Abstract: An acceleration sensor includes an outer frame body, a heating element, a first temperature sensing element for temperature measurement and a second temperature sensing element for temperature measurement, and an operational amplifier. In the outer frame body, a fluid chamber capable of sealing a fluid inside thereof is formed. The heating element is formed on a circuit mounting surface which is a specific inner wall surface of a plurality of inner wall surfaces defining the fluid chamber. The first temperature sensing element and the second temperature sensing element are formed on the circuit mounting surface. The distance from the first temperature sensing element to the heating element is shorter than the distance from the second temperature sensing element to the heating element. The operational amplifier calculates a difference between a measurement result by the first temperature sensing element and a measurement result by the second temperature sensing element.

Abstract translation: 加速度传感器包括外框体，加热元件，用于温度测量的第一温度感测元件和用于温度测量的第二温度感测元件和运算放大器。 在外框体中形成能够密封内部流体的流体室。 加热元件形成在电路安装表面上，该电路安装表面是限定流体室的多个内壁表面的特定内壁表面。 第一温度感测元件和第二温度感测元件形成在电路安装表面上。 从第一温度检测元件到加热元件的距离比从第二温度检测元件到加热元件的距离短。 运算放大器计算第一温度检测元件的测量结果与第二温度感测元件的测量结果之间的差值。