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公开(公告)号:US20220264450A1
公开(公告)日:2022-08-18
申请号:US17177985
申请日:2021-02-17
Applicant: RENESAS ELECTRONICS CORPORATION
Inventor: Shiro KAMOHARA , Akira TANABE , Kazuya UEJIMA , Jun UEHARA , Kazuya OKUYAMA
Abstract: A microcomputer performs a power supply operation to a wireless communication module at a first time interval set based on a power generation amount at a lowest day power generation amount of a temperature differential power generation module. In addition, the microcomputer performs the power supply operation to a sensor at a second time interval set based on the power generation amount at the lowest day power generation amount of the temperature differential power generation module.
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公开(公告)号:US20190273486A1
公开(公告)日:2019-09-05
申请号:US16414846
申请日:2019-05-17
Applicant: Renesas Electronics Corporation
Inventor: Akira TANABE
IPC: H03K17/041 , H03K17/0412 , H03K17/10
Abstract: Related-art back bias generation circuits cause a problem where a long time is required for transition between an operating state and a standby state because driving power is lowered to reduce the power consumption in the standby state. A back bias generation circuit outputs a predetermined voltage. The predetermined voltage is the back bias voltage of a substrate in a standby mode. A bias control circuit stores an electrical charge while a circuit block is in an operating mode, supplies the stored electrical charge to the substrate of a MOSFET included in the circuit block when the circuit block transitions from the operating mode to the standby mode, and subsequently supplies the output of the back bias generation circuit to the substrate of the MOSFET.
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公开(公告)号:US20180175136A1
公开(公告)日:2018-06-21
申请号:US15888594
申请日:2018-02-05
Applicant: Renesas Electronics Corporation
Inventor: Kenichiro HIJIOKA , Akira TANABE , Yoshihiro HAYASHI
CPC classification number: H01L28/10 , H01F17/0013 , H01F27/34 , H01F41/041 , H01F2017/002 , H01F2017/004 , H01F2017/0086 , Y10T29/4902 , Y10T29/49071
Abstract: An inductor element is formed in a multiple layer lead structure including a lead, an insulative layer that insulates leads above and below, and a via provided in the insulative layer and connecting leads above and below wherein lead layers are multiply laminated layers, characterized in that: at least a portion of at least a pair of vertically adjacent leads are coiled leads; the coiled leads are connected in series, wherein current directions of vertically adjacent coiled leads are the same by a via provided on an end portion thereof, and form a serial inductance; and an inter-lead capacitance of the vertically adjacent coiled leads is larger than an inter-lead capacitance between other coiled leads formed in the same lead layer.
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公开(公告)号:US20150138144A1
公开(公告)日:2015-05-21
申请号:US14518086
申请日:2014-10-20
Applicant: Renesas Electronics Corporation
Inventor: Akira TANABE
IPC: G06F3/045
CPC classification number: G06F3/045 , G06F3/0416 , G06F3/044
Abstract: A coordinate input device 100 includes a signal generation unit 1, a transmitting antenna unit 2, a receiving antenna 3, and a detection unit 4. The transmitting antenna unit 2 includes a plurality of antennas that transmits an electromagnetic wave W according to an AC signal. The signal generation unit 1 outputs the AC signal SIG to one of the plurality of antennas of the transmitting antenna unit 2. The receiving antenna 3 receives the electromagnetic wave W from the transmitting antenna unit 2. The detection unit 4 obtains an intensity distribution of the electromagnetic wave W corresponding to the positions of a plurality of antennas based on the electromagnetic wave W received by the receiving antenna 3, and detects a detection position according to the position of a peak in the intensity distribution.
Abstract translation: 坐标输入装置100包括信号生成单元1,发送天线单元2,接收天线3和检测单元4.发送天线单元2包括根据AC信号发送电磁波W的多个天线 。 信号生成单元1将AC信号SIG输出到发送天线单元2的多个天线之一。接收天线3从发送天线单元2接收电磁波W.检测单元4获得 基于由接收天线3接收的电磁波W对应于多个天线的位置的电磁波W,并根据强度分布中的峰值的位置来检测检测位置。
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公开(公告)号:US20140061934A1
公开(公告)日:2014-03-06
申请号:US14075513
申请日:2013-11-08
Applicant: Renesas Electronics Corporation
Inventor: Masayuki FURUMIYA , Yasutaka NAKASHIBA , Akira TANABE
IPC: H01L23/48 , H01L23/528
CPC classification number: H01L23/481 , H01L21/823871 , H01L23/5225 , H01L23/528 , H01L23/5286 , H01L2223/6627 , H01L2924/0002 , H01L2924/12044 , H01L2924/1903 , H01L2924/3011 , H01L2924/00
Abstract: A semiconductor device with a transistor region has a first conductor pattern formed within a multilayer interconnect structure positioned under a signal line and above the transistor region. The first conductor pattern is coupled to ground or a power supply and overlaps the transistor region. The signal line overlaps the first conductor pattern.
Abstract translation: 具有晶体管区域的半导体器件具有形成在位于信号线下方并位于晶体管区域之上的多层互连结构内的第一导体图案。 第一导体图案耦合到地或电源并与晶体管区重叠。 信号线与第一导体图案重叠。
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公开(公告)号:US20140060187A1
公开(公告)日:2014-03-06
申请号:US14013350
申请日:2013-08-29
Applicant: RENESAS ELECTRONICS CORPORATION
Inventor: Akira TANABE
IPC: G01P15/08
CPC classification number: G01P15/0897 , G01P15/008
Abstract: An acceleration sensor includes an outer frame body, a heating element, a first temperature sensing element for temperature measurement and a second temperature sensing element for temperature measurement, and an operational amplifier. In the outer frame body, a fluid chamber capable of sealing a fluid inside thereof is formed. The heating element is formed on a circuit mounting surface which is a specific inner wall surface of a plurality of inner wall surfaces defining the fluid chamber. The first temperature sensing element and the second temperature sensing element are formed on the circuit mounting surface. The distance from the first temperature sensing element to the heating element is shorter than the distance from the second temperature sensing element to the heating element. The operational amplifier calculates a difference between a measurement result by the first temperature sensing element and a measurement result by the second temperature sensing element.
Abstract translation: 加速度传感器包括外框体,加热元件,用于温度测量的第一温度感测元件和用于温度测量的第二温度感测元件和运算放大器。 在外框体中形成能够密封内部流体的流体室。 加热元件形成在电路安装表面上,该电路安装表面是限定流体室的多个内壁表面的特定内壁表面。 第一温度感测元件和第二温度感测元件形成在电路安装表面上。 从第一温度检测元件到加热元件的距离比从第二温度检测元件到加热元件的距离短。 运算放大器计算第一温度检测元件的测量结果与第二温度感测元件的测量结果之间的差值。
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公开(公告)号:US20130093096A1
公开(公告)日:2013-04-18
申请号:US13708207
申请日:2012-12-07
Applicant: Renesas Electronics Corporation
Inventor: Masayuki FURUMIYA , Yasutaka NAKASHIBA , Akira TANABE
IPC: H01L23/48
CPC classification number: H01L23/481 , H01L21/823871 , H01L23/5225 , H01L23/528 , H01L23/5286 , H01L2223/6627 , H01L2924/0002 , H01L2924/12044 , H01L2924/1903 , H01L2924/3011 , H01L2924/00
Abstract: A semiconductor device with a transistor region has a first conductor pattern formed within a multilayer interconnect structure positioned under a signal line and above the transistor region. The first conductor pattern is coupled to ground or a power supply and overlaps the transistor region. The signal line overlaps the first conductor pattern.
Abstract translation: 具有晶体管区域的半导体器件具有形成在位于信号线下方并位于晶体管区域之上的多层互连结构内的第一导体图案。 第一导体图案耦合到地或电源并与晶体管区重叠。 信号线与第一导体图案重叠。
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公开(公告)号:US20210043628A1
公开(公告)日:2021-02-11
申请号:US17079741
申请日:2020-10-26
Applicant: RENESAS ELECTRONICS CORPORATION
Inventor: Akira TANABE
IPC: H01L27/092 , H01L21/8234 , H03K17/06
Abstract: Wells formed in a semiconductor device can be discharged faster in a transition from a stand-by state to an active state. The semiconductor device includes an n-type well applied, in an active state, with a power supply voltage and, in a stand-by state, with a voltage higher than the power supply voltage, a p-type well applied, in the active state, with a ground voltage and, in the stand-by state, with a voltage lower than the ground voltage, and a path which, in a transition from the stand-by state to the active state, electrically couples the n-type well and the p-type well.
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公开(公告)号:US20190187737A1
公开(公告)日:2019-06-20
申请号:US16173576
申请日:2018-10-29
Applicant: RENESAS ELECTRONICS CORPORATION
Inventor: Masaharu MATSUDAIRA , Takashi HASE , Akira TANABE , Kazuya UEJIMA
CPC classification number: G05F3/205 , G01K7/01 , G05F3/245 , H03K17/145 , H03K2217/0018
Abstract: There is a need to ensure operations at a predetermined operating frequency when a temperature changes in an operating state. A semiconductor device includes: a bias-applied portion applied with a substrate bias; a temperature sensor to detect a temperature; and a substrate bias generator to apply the bias-applied portion with a substrate bias corresponding to the temperature detected by the temperature sensor. The bias-applied portion, while applied with a substrate bias by the substrate bias generator, shifts between an operating state and a stopped state. The substrate bias generator applies the bias-applied portion with a substrate bias configured so as not to cause an upper limit of an operating frequency for the bias-applied portion to be smaller than a predetermined value under condition of the temperature detected by the temperature sensor.
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公开(公告)号:US20180374852A1
公开(公告)日:2018-12-27
申请号:US16005825
申请日:2018-06-12
Applicant: Renesas Electronics Corporation
Inventor: Akira TANABE
IPC: H01L27/092 , H03K17/06 , H01L21/8234
Abstract: Wells formed in a semiconductor device can be discharged faster in a transition from a stand-by state to an active state. The semiconductor device includes an n-type well applied, in an active state, with a power supply voltage and, in a stand-by state, with a voltage higher than the power supply voltage, a p-type well applied, in the active state, with a ground voltage and, in the stand-by state, with a voltage lower than the ground voltage, and a path which, in a transition from the stand-by state to the active state, electrically couples the n-type well and the p-type well.
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