公开(公告)号：US06853272B1

公开(公告)日：2005-02-08

申请号：US10295221

申请日：2002-11-15

Applicant: Rodney Alan Hughes

Inventor： Rodney Alan Hughes

IPC: H01P1/15 ,  H03B1/00 ,  H03J3/18 ,  H03J3/20 ,  H03J5/12

CPC classification number: H03J3/20 ,  H01P1/15 ,  H03B2201/025 ,  H03J3/185 ,  H03J2200/10 ,  H03J2200/38

Abstract: A linear voltage controlled capacitance circuit is provided that includes a plurality of MOS varactor pairs. Each MOS varactor pair is operable to receive a first tuning voltage, a second tuning voltage, and a bias voltage unique to the MOS varactor pair. The capacitance circuit is operable to generate a positive tank node signal and a negative tank node signal based on the first and second tuning voltages and the bias voltages. A means to control voltage-to-capacitance gain is also provided to compensate for coarse tuning capacitance change.

Abstract translation: 提供了包括多个MOS变容二极管对的线性压控电容电路。 每个MOS变容二极管对可操作以接收第一调谐电压，第二调谐电压和MOS变容二极管对独有的偏置电压。 电容电路可操作以基于第一和第二调谐电压和偏置电压产生正的储罐结点信号和负罐结点信号。 还提供了一种控制电压 - 电容增益的手段来补偿粗调谐电容变化。

公开(公告)号：US08890630B2

公开(公告)日：2014-11-18

申请号：US13185152

申请日：2011-07-18

Applicant: Rodney Alan Hughes

Inventor： Rodney Alan Hughes

IPC: H03K3/02 ,  H03B5/24 ,  H03K3/354 ,  H03B5/04 ,  H03K3/0231 ,  H03K4/12

CPC classification number: H03B5/24 ,  H02M3/156 ,  H03B5/04 ,  H03B2200/0074 ,  H03K3/0231 ,  H03K3/354 ,  H03K4/12

Abstract: An oscillator formed from low cost discrete semiconductors and passive devices creates a linear periodic ramp of constant frequency with ramp slope based on an external voltage signal. Parameters are stable over a wide range of temperatures and variations of transistor parameters that normally degrade in extreme environments. The oscillator period can be phase and frequency synchronized to an external clock source over a wide range of frequencies. The oscillator ramp generator phase can be synchronized on a cycle by cycle basis for incorporation in power converters employing spread spectral EMI reduction techniques, multi-converter systems employing clock interleaving for distribution bus filter optimization, and resonant mode converters employing zero voltage switching techniques. Oscillator ramp rate is independent of frequency and can be synchronized to DC (inhibit) for use in ultra low power burst mode power conversion.

Abstract translation: 由低成本分立半导体和无源器件形成的振荡器基于外部电压信号产生具有斜坡斜率的恒定频率的线性周期性斜坡。 参数在宽温度范围内稳定，晶体管参数的变化在极端环境中通常会降解。 振荡器周期可以在宽频率范围内与外部时钟源相位和频率同步。 振荡器斜坡发生器相位可以逐周期同步，并入采用扩频EMI降低技术的电力转换器，采用时钟交叉分配总线滤波器优化的多转换器系统，以及采用零电压切换技术的谐振模式转换器。 振荡器斜率与频率无关，可以同步到直流（禁止），用于超低功耗突发模式电源转换。

公开(公告)号：US20130021108A1

公开(公告)日：2013-01-24

申请号：US13185152

申请日：2011-07-18

Applicant: Rodney Alan Hughes

Inventor： Rodney Alan Hughes

IPC: H03B5/24

CPC classification number: H03B5/24 ,  H02M3/156 ,  H03B5/04 ,  H03B2200/0074 ,  H03K3/0231 ,  H03K3/354 ,  H03K4/12

Abstract: An oscillator formed from low cost discrete semiconductors and passive devices creates a linear periodic ramp of constant frequency with ramp slope based on an external voltage signal. Parameters are stable over a wide range of temperatures and variations of transistor parameters that normally degrade in extreme environments. The oscillator period can be phase and frequency synchronized to an external clock source over a wide range of frequencies. The oscillator ramp generator phase can be synchronized on a cycle by cycle basis for incorporation in power converters employing spread spectral EMI reduction techniques, multi-converter systems employing clock interleaving for distribution bus filter optimization, and resonant mode converters employing zero voltage switching techniques. Oscillator ramp rate is independent of frequency and can be synchronized to DC (inhibit) for use in ultra low power burst mode power conversion.

Abstract translation: 由低成本分立半导体和无源器件形成的振荡器基于外部电压信号产生具有斜坡斜率的恒定频率的线性周期性斜坡。 参数在宽温度范围内稳定，晶体管参数的变化在极端环境中通常会降解。 振荡器周期可以在宽频率范围内与外部时钟源相位和频率同步。 振荡器斜坡发生器相位可以逐周期同步，并入采用扩频EMI降低技术的电力转换器，采用时钟交叉分配总线滤波器优化的多转换器系统，以及采用零电压切换技术的谐振模式转换器。 振荡器斜率与频率无关，可以同步到直流（禁止），用于超低功耗突发模式电源转换。

公开(公告)号：US20090251215A1

公开(公告)日：2009-10-08

申请号：US12099099

申请日：2008-04-07

Applicant: Rodney Alan Hughes

Inventor： Rodney Alan Hughes

IPC: H03F3/45

CPC classification number: H03F3/45076 ,  H03F3/3066 ,  H03F2203/45112 ,  H03F2203/45292

Abstract: An output stage of an amplifier circuit includes one or more output transistors that are selectively driven by a boosted drive circuit, where the boosted drive circuit is arranged such that the output range of the amplifier circuit is increased while maintaining reduced quiescent current. The drive signal to each output transistor is selectively increased only when demanded by the output load conditions. The threshold for boosting the drive signal can be adjusted for optimized performance. In one example, a class AB output stage includes a separate drive boost circuit for each output transistor. For this example, each drive boost circuit has a separate threshold for boosting each of the drive signals to the output transistors. The boosting can also be adjusted to optimize the differential input stage and current mirror maximum current requirement while maintaining minimum required bias currents.

Abstract translation: 放大器电路的输出级包括由升压驱动电路有选择地驱动的一个或多个输出晶体管，其中升压驱动电路被布置成使得放大器电路的输出范围增加同时保持降低的静态电流。 仅当根据输出负载条件要求时，选择性地增加到每个输出晶体管的驱动信号。 可以调整升高驱动信号的阈值以优化性能。 在一个示例中，AB类输出级包括用于每个输出晶体管的单独的驱动升压电路。 对于该示例，每个驱动器升压电路具有用于将每个驱动信号升压到输出晶体管的单独阈值。 还可以调节升压以优化差分输入级和电流镜最大电流要求，同时保持最小所需偏置电流。

公开(公告)号：US07545210B2

公开(公告)日：2009-06-09

申请号：US11753405

申请日：2007-05-24

Applicant: Rodney Alan Hughes

Inventor： Rodney Alan Hughes

IPC: H03F1/36

CPC classification number: H03G1/0088 ,  H03F3/45475 ,  H03F2203/45136 ,  H03F2203/45522 ,  H03F2203/45526 ,  H03F2203/45534

Abstract: A programmable gain amplifier (PGA) circuit includes a gain adjust circuit and a gain select circuit that are both coupled to an output of an amplifier. The gain select circuit completes feedback to the amplifier while the gain adjust circuit is arranged to boost or cut the gain of the gain selection circuit. The gain adjust circuit can be arranged as a trim adjustment to the overall gain of the PGA circuit, where a different trim adjustment can be mapped to each gain setting such as from a look-up table. In other example implementations, the PGA circuit can periodically switch between multiple gain settings using a modulation scheme such that the overall gain is blended between the various gain settings according to a duty cycle, pulse-width, or delta-sigma modulation, with a time averaging effect on the overall gain of the PGA circuit.

公开(公告)号：US20080061873A1

公开(公告)日：2008-03-13

申请号：US11753405

申请日：2007-05-24

Applicant: Rodney Alan Hughes

Inventor： Rodney Alan Hughes

IPC: H03F1/38

CPC classification number: H03G1/0088 ,  H03F3/45475 ,  H03F2203/45136 ,  H03F2203/45522 ,  H03F2203/45526 ,  H03F2203/45534

Abstract: A programmable gain amplifier (PGA) circuit includes a gain adjust circuit and a gain select circuit that are both coupled to an output of an amplifier. The gain select circuit completes feedback to the amplifier while the gain adjust circuit is arranged to boost or cut the gain of the gain selection circuit. The gain adjust circuit can be arranged as a trim adjustment to the overall gain of the PGA circuit, where a different trim adjustment can be mapped to each gain setting such as from a look-up table. In other example implementations, the PGA circuit can periodically switch between multiple gain settings using a modulation scheme such that the overall gain is blended between the various gain settings according to a duty cycle, pulse-width, or delta-sigma modulation, with a time averaging effect on the overall gain of the PGA circuit.