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公开(公告)号:US12199040B2
公开(公告)日:2025-01-14
申请号:US17180491
申请日:2021-02-19
Applicant: Samsung Electronics Co., Ltd.
Inventor: Hyeongyu You , Jisu Yu , Jae-Woo Seo , Seung Man Lim
IPC: H01L23/528 , H01L21/285 , H01L21/8238 , H01L27/092 , H01L29/06 , H01L29/08 , H01L29/417 , H01L29/423 , H01L29/45 , H01L29/66 , H01L29/78 , H01L29/786
Abstract: Disclosed is a semiconductor device comprising a first logic cell and a second logic cell on a substrate. Each of the first and second logic cells includes a first active region and a second active region that are adjacent to each other in a first direction, a gate electrode that runs across the first and second active regions and extends lengthwise in the first direction, and a first metal layer on the gate electrode. The first metal layer includes a first power line and a second power line that extend lengthwise in a second direction perpendicular to the first direction, and are parallel to each other. The first and second logic cells are adjacent to each other in the second direction along the first and second power lines. The first and second active regions extend lengthwise in the second direction from the first logic cell to the second logic cell.
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公开(公告)号:US12147751B2
公开(公告)日:2024-11-19
申请号:US17360355
申请日:2021-06-28
Applicant: Samsung Electronics Co., Ltd.
Inventor: Seungman Lim , Hakchul Jung , Sanghoon Baek , Jaewoo Seo , Jisu Yu , Hyeongyu You
IPC: G06F30/3953 , G06F30/327 , G06F119/06 , H01L23/528
Abstract: An integrated circuit includes a plurality of logic cells arranged in a first row extending in a first direction and including different types of active areas extending in the first direction, a filler cell arranged in a second row adjacent to the first row in a second direction orthogonal to the first direction and extending in the first direction, and a first routing wiring line arranged in the second row and connecting a first logic cell and a second logic cell apart from each other by a first distance among the plurality of logic cells. A height of the first row is different from a height of the second row.
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13.
公开(公告)号:US20240303410A1
公开(公告)日:2024-09-12
申请号:US18670009
申请日:2024-05-21
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor: Jisu Yu , Jaeho Park , Sanghoon Baek , Hyeongyu You , Seungyoung Lee , Seungman Lim
IPC: G06F30/392 , G06F30/3953 , G06F30/398 , G06F117/12 , H01L23/528 , H01L29/423
CPC classification number: G06F30/392 , G06F30/3953 , G06F30/398 , H01L23/5283 , H01L23/5286 , H01L29/42376 , G06F2117/12
Abstract: A method includes placing standard cells based on a standard cell library and generating layout data, and placing a filler cell selected from among a first type filler cell and a second type filler cell by using the layout data. The filler cell is placed based on a density of a pattern formed in the standard cell. The standard cell library includes data defining the first and second type filler cells. A density of a contact formed on an active region of the second type filler cell to contact the active region of the second type filler cell is lower than a density of a contact formed on an active region of a first type filler cell to contact the active region of the first type filler cell.
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14.
公开(公告)号:US20230290784A1
公开(公告)日:2023-09-14
申请号:US18175696
申请日:2023-02-28
Applicant: Samsung Electronics Co., Ltd.
Inventor: Jungho Do , Jisu Yu , Hyeongyu You , Yunkyeong Jang , Minjae Jeong
IPC: H01L27/118 , H01L27/02
CPC classification number: H01L27/11807 , H01L27/0207 , H01L2027/11809
Abstract: An integrated circuit may include a first active pattern group extending in a first direction in a first row and including a plurality of first active patterns overlapping each other in the first direction, the first row extending in the first direction, and a plurality of gate electrodes extending in a second direction perpendicular to the first direction in the first row. The plurality of first active patterns may include any two first active patterns that are adjacent to each other in the first direction, the two first active patterns have first and second widths in the second direction, respectively, and the first and second widths are identical or are different by a first offset or a second offset.
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15.
公开(公告)号:US20220262786A1
公开(公告)日:2022-08-18
申请号:US17670626
申请日:2022-02-14
Applicant: Samsung Electronics Co., Ltd.
Inventor: Jisu Yu , Jungho Do , Jaewoo Seo , Hyeongyu You , Minjae Jeong
IPC: H01L27/02 , H01L27/118
Abstract: An integrated circuit including a first standard cell placed continuously on a row having a first height and a row having a second height different from the first height. The integrated circuit also includes a second standard cell continuously placed on a row having the first height and a row having the second height, a plurality of first power lines formed on boundaries of the plurality of rows and configured to supply a first supply voltage to the standard cells, and a plurality of second power lines formed on boundaries of the plurality of rows and configured to supply a second supply voltage to the standard cells. A placement sequence of the power lines supplying a voltage to the first standard cell being different from a placement sequence of the power lines supplying a voltage to the second standard cell.
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