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1.发明申请公开(公告)号：US20210334449A1
公开(公告)日：2021-10-28
申请号：US17225773
申请日：2021-04-08
发明人： Jisu Yu , Jaeho Park , Sanghoon Baek , Hyeongyu You , Seungyoung Lee , Seungman Lim
IPC分类号： G06F30/398 , H01L23/528 , H01L29/423 , G06F30/392 , G06F30/3953
摘要： A method includes placing standard cells based on a standard cell library and generating layout data, and placing a filler cell selected from among a first type filler cell and a second type filler cell by using the layout data. The filler cell is placed based on a density of a pattern formed in the standard cell. The standard cell library includes data defining the first and second type filler cells. A density of a contact formed on an active region of the second type filler cell to contact the active region of the second type filler cell is lower than a density of a contact formed on an active region of a first type filler cell to contact the active region of the first type filler cell.
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公开(公告)号：US20230307436A1
公开(公告)日：2023-09-28
申请号：US18185414
申请日：2023-03-17
发明人： Jungho Do , Taejoong Song , Sanghoon Baek , Jisu Yu , Hyeongyu You , Minjae Jeong , Jonghoon Jung
IPC分类号： H01L27/02 , H01L29/78 , H01L29/423 , H01L29/775 , H01L29/06 , H01L29/786 , H01L27/088
CPC分类号： H01L27/0207 , H01L29/7851 , H01L29/42392 , H01L29/775 , H01L29/0673 , H01L29/78696 , H01L27/0886
摘要： An integrated circuit may include a first function cell and a second function cell each corresponding to a first circuit, wherein the first function cell may include a first pattern extending in a first direction along a first grid in a first layer and a second pattern extending in the first direction along a second grid in a second layer, the first grid may have a first pitch greater than a second pitch of the second grid in a second direction crossing the first direction, and the second function cell may include a layout of the first function cell and have a length greater than a length of the first function cell by the first pitch in the second direction.
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公开(公告)号：US11755809B2
公开(公告)日：2023-09-12
申请号：US17458948
申请日：2021-08-27
发明人： Jisu Yu , Jaewoo Seo , Hyeongyu You , Sanghoon Baek , Jonghoon Jung
IPC分类号： G06F30/00 , G06F30/392 , H01L23/50 , H01L27/02
CPC分类号： G06F30/392 , H01L23/50 , H01L27/0207
摘要： An integrated circuit is provided. The integrated circuit includes a first cell that has a first height and is arranged in a first row which extends in a first direction; a second cell that has a second height and is arranged in a second row which extends in the first direction and is adjacent to the first row, wherein the second cell is adjacent to the first cell in a second direction perpendicular to the first direction; and a power line that extends in the first direction, is arranged on a boundary between the first cell and the second cell, and is configured to supply power to the first cell and the second cell. The first cell overlaps a first width of the power line along the second direction and the second cell overlaps a second width of the power line along the second direction, and the first width and the second width are different from each other.
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4.发明公开公开(公告)号：US20240303410A1
公开(公告)日：2024-09-12
申请号：US18670009
申请日：2024-05-21
发明人： Jisu Yu , Jaeho Park , Sanghoon Baek , Hyeongyu You , Seungyoung Lee , Seungman Lim
IPC分类号： G06F30/392 , G06F30/3953 , G06F30/398 , G06F117/12 , H01L23/528 , H01L29/423
CPC分类号： G06F30/392 , G06F30/3953 , G06F30/398 , H01L23/5283 , H01L23/5286 , H01L29/42376 , G06F2117/12
摘要： A method includes placing standard cells based on a standard cell library and generating layout data, and placing a filler cell selected from among a first type filler cell and a second type filler cell by using the layout data. The filler cell is placed based on a density of a pattern formed in the standard cell. The standard cell library includes data defining the first and second type filler cells. A density of a contact formed on an active region of the second type filler cell to contact the active region of the second type filler cell is lower than a density of a contact formed on an active region of a first type filler cell to contact the active region of the first type filler cell.
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5.发明公开公开(公告)号：US20230290784A1
公开(公告)日：2023-09-14
申请号：US18175696
申请日：2023-02-28
发明人： Jungho Do , Jisu Yu , Hyeongyu You , Yunkyeong Jang , Minjae Jeong
IPC分类号： H01L27/118 , H01L27/02
CPC分类号： H01L27/11807 , H01L27/0207 , H01L2027/11809
摘要： An integrated circuit may include a first active pattern group extending in a first direction in a first row and including a plurality of first active patterns overlapping each other in the first direction, the first row extending in the first direction, and a plurality of gate electrodes extending in a second direction perpendicular to the first direction in the first row. The plurality of first active patterns may include any two first active patterns that are adjacent to each other in the first direction, the two first active patterns have first and second widths in the second direction, respectively, and the first and second widths are identical or are different by a first offset or a second offset.
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6.发明申请公开(公告)号：US20220262786A1
公开(公告)日：2022-08-18
申请号：US17670626
申请日：2022-02-14
发明人： Jisu Yu , Jungho Do , Jaewoo Seo , Hyeongyu You , Minjae Jeong
IPC分类号： H01L27/02 , H01L27/118
摘要： An integrated circuit including a first standard cell placed continuously on a row having a first height and a row having a second height different from the first height. The integrated circuit also includes a second standard cell continuously placed on a row having the first height and a row having the second height, a plurality of first power lines formed on boundaries of the plurality of rows and configured to supply a first supply voltage to the standard cells, and a plurality of second power lines formed on boundaries of the plurality of rows and configured to supply a second supply voltage to the standard cells. A placement sequence of the power lines supplying a voltage to the first standard cell being different from a placement sequence of the power lines supplying a voltage to the second standard cell.
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公开(公告)号：US20240105710A1
公开(公告)日：2024-03-28
申请号：US18469627
申请日：2023-09-19
发明人： Hyeongyu You , Jungho Do , Geonwoo Nam , Jisu Yu , Minjae Jeong , Jaehee Cho
IPC分类号： H01L27/02 , H01L23/522 , H01L23/528 , H01L27/088 , H01L27/092
CPC分类号： H01L27/0207 , H01L23/5226 , H01L23/528 , H01L27/0886 , H01L27/0928
摘要： An integrated circuit includes a first cell in a first row extending in a first direction, a first power line extending in the first direction in a power rail layer, and configured to provide a first supply voltage to the first cell, and a first pattern overlapping a first boundary of the first row, and extending in the first direction in a first wiring layer, wherein the first cell includes at least one pattern extending in the first direction in the first wiring layer, and at least one transistor between the power rail layer and the first wiring layer, and the first pattern is configured to receive an input signal or an output signal of the first cell.
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8.发明公开公开(公告)号：US20230297752A1
公开(公告)日：2023-09-21
申请号：US18162120
申请日：2023-01-31
发明人： Jungho Do , Jisu Yu , Hyeongyu You , Minjae Jeong , Sanghoon Baek
IPC分类号： G06F30/392
CPC分类号： G06F30/392
摘要： Integrated circuits including abutted blocks and methods of designing layouts of the integrated circuits are disclosed. The integrated circuit includes a first block having a first function cell array therein, which is at least partially surrounded by a first plurality of finishing cells, and a second block extending adjacent the first block. The second block includes a second function cell array therein, which is at least partially surrounded by a second plurality of finishing cells. The first plurality of finishing cells include: (i) a first finishing cell placed at a boundary of the integrated circuit, and (ii) a second finishing cell different from the first finishing cell, which is placed at a boundary between the first block and the second block.
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9.发明申请公开(公告)号：US20230049882A1
公开(公告)日：2023-02-16
申请号：US17818080
申请日：2022-08-08
发明人： Jungho Do , Jisu Yu , Hyeongyu You , Minjae Jeong , Yujin Pyo
IPC分类号： G06F30/392 , G06F30/394
摘要： An integrated circuit includes a plurality of standard cells including first and second standard cells arranged adjacent to each other in a first direction, and first, second, and third metal layers sequentially stacked in a vertical direction. At least one power segment is arranged adjacent a region where at least one of the first standard cell and the second standard cell is arranged. The at least one power segment is configured to provide power to the plurality of standard cells and is formed as a pattern of the third metal layer extending in a second direction.
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公开(公告)号：US20240250028A1
公开(公告)日：2024-07-25
申请号：US18397483
申请日：2023-12-27
发明人： Jungho DO , Jisu Yu , Hyeongyu You , Seungyoung Lee , Minjae Jeong
IPC分类号： H01L23/528 , H01L27/088 , H01L29/06 , H01L29/417 , H01L29/423 , H01L29/775 , H01L29/786
CPC分类号： H01L23/5286 , H01L27/088 , H01L29/0673 , H01L29/4175 , H01L29/42392 , H01L29/775 , H01L29/78696
摘要： An integrated circuit may include gate electrodes including first and second gate electrodes being apart in a first direction and third and fourth gate electrodes being apart in the first direction. The second and third gate electrodes receive a first control signal, and the first and fourth gate electrodes receive a second control signal. The integrated circuit further includes a first drain region between the first and second gate electrodes and a second drain region between the third and fourth gate electrodes, wherein the first and second drain regions are electrically connected to each other. The integrated circuit includes a front-side wiring layer connected to at least one of the first and second drain regions and the first to fourth gate electrodes, and a backside wiring layer connected to at least another one of the first and second drain regions and the first to fourth gate electrodes.
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