公开(公告)号：US10971222B2

公开(公告)日：2021-04-06

申请号：US16717532

申请日：2019-12-17

Applicant: SANDISK TECHNOLOGIES LLC

Inventor： Lei Lin ,  Zhuojie Li ,  Henry Chin ,  Cynthia Hsu

IPC: G11C16/06 ,  G11C11/56 ,  G11C16/04 ,  G11C16/34 ,  G11C16/26 ,  G11C29/12 ,  G11C16/08

Abstract: An apparatus is provided that includes a plurality of memory cells, a programming circuit configured to apply a plurality of programming pulses to the memory cells, and a scanning circuit configured to repeatedly switch between performing an n-state bitscan after each programming pulse until first predetermined criteria are satisfied, and performing an m-state bitscan after each programming pulse until second predetermined criteria are satisfied, where m>n, and n>0.

公开(公告)号：US20190371395A1

公开(公告)日：2019-12-05

申请号：US16000413

申请日：2018-06-05

Applicant: SANDISK TECHNOLOGIES LLC

Inventor： Lei Lin ,  Zhuojie Li ,  Henry Chin ,  Cynthia Hsu

IPC: G11C11/56 ,  G11C16/04 ,  G11C16/34 ,  G11C16/08 ,  G11C16/26 ,  G11C29/12

Abstract: An apparatus is provided that includes a plurality of memory cells, a programming circuit configured to apply a plurality of programming pulses to the memory cells, and a scanning circuit configured to repeatedly switch between performing an n-state bitscan after each programming pulse until first predetermined criteria are satisfied, and performing an m-state bitscan after each programming pulse until second predetermined criteria are satisfied, where m>n, and n>0.

公开(公告)号：US09978456B2

公开(公告)日：2018-05-22

申请号：US14543660

申请日：2014-11-17

Applicant: SanDisk Technologies LLC

Inventor： Anubhav Khandelwal ,  Dana Lee ,  Abhijeet Manohar ,  Henry Chin ,  Gautam Dusija ,  Daniel Tuers ,  Chris Avila ,  Cynthia Hsu

IPC: G11C16/34 ,  G11C11/56 ,  G11C16/04 ,  G11C16/08 ,  G11C16/10 ,  G11C16/26 ,  G11C16/32

CPC classification number: G11C16/3427 ,  G11C11/5628 ,  G11C11/5642 ,  G11C16/0483 ,  G11C16/08 ,  G11C16/10 ,  G11C16/26 ,  G11C16/32 ,  G11C16/3418

Abstract: Techniques are presented to reduce the amount of read disturb on partially written blocks of NAND type non-volatile memory, both for when determining the last written word line in a block and also for data read. In both cases, non-selected word lines that are unwritten or, in the case of finding the last written word line, may be unwritten are biased with a lower read-pass voltage then is typically used. The result of such reads can also be applied to an algorithm for finding the last written word by skipping a varying number of word lines. Performance in a last written page determination can also be improved by use of shorter bit line settling times than for a standard read.