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公开(公告)号:US20240063797A1
公开(公告)日:2024-02-22
申请号:US18240389
申请日:2023-08-31
Applicant: Semiconductor Energy Laboratory Co., Ltd.
Inventor: Masashi FUJITA , Yutaka SHIONOIRI , Kiyoshi KATO , Hidetomo KOBAYASHI
IPC: H03K19/17728 , H03K19/173 , H03K19/17758 , H03K19/17772
CPC classification number: H03K19/17728 , H03K19/1737 , H03K19/17758 , H03K19/17772
Abstract: An object is to provide a semiconductor device that can maintain the connection relation between logic circuit units or the circuit configuration of each of the logic circuit units even after supply of power supply voltage is stopped. Another object is to provide a semiconductor device in which the connection relation between logic circuit units or the circuit configuration of each of the logic circuit units can be changed at high speed. In a reconfigurable circuit, an oxide semiconductor is used for a semiconductor element that stores data on the circuit configuration, connection relation, or the like. Specifically, the oxide semiconductor is used for a channel formation region of the semiconductor element.
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公开(公告)号:US20170040344A1
公开(公告)日:2017-02-09
申请号:US15227009
申请日:2016-08-03
Applicant: Semiconductor Energy Laboratory Co., Ltd.
Inventor: Masashi FUJITA
IPC: H01L27/12
CPC classification number: H01L27/124 , H01L27/1225 , H01L27/1255 , H01L27/3244 , H01L29/78648 , H01L29/7869 , H01L29/78696
Abstract: A low-power-consumption semiconductor device or the like is provided. Charge is accumulated in a node connected to a capacitor for a certain period to perform a current-voltage conversion. A gate of a transistor is connected to the node and the potential of one of a source and a drain of the transistor is changed gradually or continuously so that the potential is read when the transistor is turned on. The threshold voltage of the transistor and the capacitance value of the node are measured, so that the current-voltage conversion is performed more precisely.
Abstract translation: 提供了低功耗半导体器件等。 在与电容器连接的节点中累积一定时间的电荷进行电流 - 电压转换。 晶体管的栅极连接到节点,并且晶体管的源极和漏极之一的电位逐渐或连续地改变,使得当晶体管导通时,电位被读取。 测量晶体管的阈值电压和节点的电容值,从而更精确地执行电流 - 电压转换。
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公开(公告)号:US20170005669A1
公开(公告)日:2017-01-05
申请号:US15189123
申请日:2016-06-22
Applicant: Semiconductor Energy Laboratory Co., Ltd.
Inventor: Masashi FUJITA
IPC: H03M1/66 , H01L27/12 , H01L23/50 , H01L29/786
CPC classification number: H01L23/50 , H01L27/1214 , H01L27/1255 , H01L29/7869 , H03M1/002 , H03M1/745
Abstract: A semiconductor device with low power consumption is provided. The semiconductor device can serve as a current output DA converter. The semiconductor device converts a current corresponding to a digital signal into a voltage and then holds the voltage, which allows output of the analog voltage even after stopping supply of the current. A plurality of circuits that converts a current into a voltage is provided, whereby a settling time for changing the analog output voltage is reduced.
Abstract translation: 提供具有低功耗的半导体器件。 半导体器件可以用作电流输出DA转换器。 半导体器件将对应于数字信号的电流转换为电压,然后保持电压,即使在停止电流供应之后也允许输出模拟电压。 提供了将电流转换成电压的多个电路,从而降低了用于改变模拟输出电压的稳定时间。
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公开(公告)号:US20250028379A1
公开(公告)日:2025-01-23
申请号:US18716284
申请日:2022-12-08
Applicant: Semiconductor Energy Laboratory Co., Ltd.
Inventor: Yoshiyuki KUROKAWA , Masashi FUJITA , Kazuaki OHSHIMA
IPC: G06F1/3287 , G11C11/4074 , G11C11/4096 , H01L29/786
Abstract: A novel semiconductor is provided. The semiconductor includes a first component, a second component, and an instruction portion. The first component includes a first memory circuit having a function of storing first setting information in a state where power is supplied, and a second memory circuit having a function of storing the first setting information in a state where power is not supplied. The second component includes a third memory circuit having a function of storing second setting information in a state where power is supplied, and a fourth memory circuit having a function of storing the second setting information in a state where power is not supplied. The instruction portion has a function of controlling whether power is supplied to each of the first component and the second component. Each of the second memory circuit and the fourth memory circuit includes a transistor including a metal oxide in a semiconductor layer where a channel is formed.
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公开(公告)号:US20220343954A1
公开(公告)日:2022-10-27
申请号:US17640452
申请日:2020-09-08
Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
Inventor: Takeshi AOKI , Munehiro KOZUMA , Masashi FUJITA , Takahiko ISHIZU
IPC: G11C7/06 , G11C7/08 , G11C11/4091 , G11C11/54
Abstract: A semiconductor device in which energy required for data transfer between an arithmetic device and a memory is reduced is provided. The semiconductor device includes a peripheral circuit and a memory cell array. The peripheral circuit has a function of a driver circuit and a control circuit for the memory cell array, and an arithmetic function. The peripheral circuit includes a sense amplifier circuit and an arithmetic circuit, and the memory cell array includes a memory cell and a bit line. The sense amplifier circuit has a function of determining whether the bit line is at a high level or a low level, and outputs the result to the arithmetic circuit. The arithmetic circuit has a function of performing a product-sum operation, the result of which is output from the semiconductor device.
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公开(公告)号:US20220262953A1
公开(公告)日:2022-08-18
申请号:US17628091
申请日:2020-07-27
Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
Inventor: Munehiro KOZUMA , Takahiko ISHIZU , Takeshi AOKI , Masashi FUJITA , Kazuma FURUTANI , Kousuke SASAKI
IPC: H01L29/786 , H01L27/108 , G11C7/10 , G11C7/12 , G11C7/14 , G06F7/544
Abstract: A semiconductor device having a novel structure is provided. The semiconductor device includes a CPU and an accelerator. The accelerator includes a first memory circuit and an arithmetic circuit. The first memory circuit includes a first transistor. The first transistor includes a semiconductor layer containing a metal oxide in a channel formation region. The arithmetic circuit includes a second transistor. The second transistor includes a semiconductor layer containing silicon in a channel formation region. The first transistor and the second transistor are provided to be stacked. The CPU includes a CPU core including a flip-flop provided with a backup circuit. The backup circuit includes a third transistor. The third transistor includes a semiconductor layer containing a metal oxide in a channel formation region.
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公开(公告)号:US20180061335A1
公开(公告)日:2018-03-01
申请号:US15684051
申请日:2017-08-23
Applicant: Semiconductor Energy Laboratory Co., Ltd.
Inventor: Masashi FUJITA
IPC: G09G3/36 , H01L29/423 , G02F1/133 , H01L29/786 , H01L29/08 , G08C19/36
CPC classification number: G09G3/3611 , G02F1/13306 , G02F2201/44 , G08C19/36 , G09G3/3291 , G09G3/3688 , G09G2300/046 , G09G2310/027 , G09G2310/0291 , H01L27/1225 , H01L29/08 , H01L29/42384 , H01L29/78648 , H01L29/7869 , H01L29/78696
Abstract: To provide a novel semiconductor device or display device. The semiconductor device includes a decoder circuit, an amplifier circuit, and an arithmetic circuit. The amplifier circuit includes a first amplifier and a second amplifier. One of the first amplifier and the second amplifier has a function of inspecting an output of the other of the first amplifier and the second amplifier. The arithmetic circuit has a function of calculating an error of a potential output from the first amplifier or the second amplifier, on the basis of a result of the inspection. The decoder circuit has a function of correcting a video signal input to the decoder circuit by subtracting the error of the potential from the video signal.
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公开(公告)号:US20160225772A1
公开(公告)日:2016-08-04
申请号:US15007259
申请日:2016-01-27
Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
Inventor: Masashi TSUBUKU , Kazuaki OHSHIMA , Masashi FUJITA , Daigo SHIMADA , Tsutomu MURAKAWA
IPC: H01L27/105 , H01L29/786 , H01L27/12
CPC classification number: H01L29/7869 , G11C11/401 , H01L27/1156 , H01L27/1225 , H01L27/1255 , H01L29/45 , H01L29/4908 , H01L29/78618 , H01L29/78621 , H01L29/78648 , H01L29/78696
Abstract: A semiconductor device that can measure a minute current. The semiconductor device includes a first transistor, a second transistor, a node, and a capacitor. The first transistor includes an oxide semiconductor in a channel formation region. The node is electrically connected to a gate of the second transistor and a first terminal of the capacitor. The node is brought into an electrically floating state by turning off the first transistor after a potential V0 is supplied. Change in a potential VFN of the node over time is expressed by Formula (1). In Formula (1), t is elapsed time after the node is brought into the electrically floating state, τ is a constant with a unit of time, and β is a constant greater than or equal to 0.4 and less than or equal to 0.6. V FN ( t ) = V 0 × - ( t τ ) β ( 1 )
Abstract translation: 可以测量微小电流的半导体器件。 半导体器件包括第一晶体管,第二晶体管,节点和电容器。 第一晶体管包括沟道形成区中的氧化物半导体。 该节点电连接到第二晶体管的栅极和电容器的第一端子。 通过在提供电位V0之后关闭第一晶体管,使节点进入电浮动状态。 随着时间的推移,节点的潜在VFN的变化由公式(1)表示。 在公式(1)中,t是节点进入电浮动状态之后的经过时间,τ是以时间为单位的常数,β是大于或等于0.4且小于等于0.6的常数。 V FN(t)= V 0× - (tτ)β(1)
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