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    MEMORY DEVICE AND SEMICONDUCTOR DEVICE INCLUDING THE MEMORY DEVICE
    8.
    发明申请
    MEMORY DEVICE AND SEMICONDUCTOR DEVICE INCLUDING THE MEMORY DEVICE 有权

    公开(公告)号：US20220139917A1

    公开(公告)日：2022-05-05

    申请号：US17414614

    申请日：2019-11-15

    申请人： SEMICONDUCTOR ENERGY LABORATORY CO., LTD.

    发明人： Shunpei YAMAZAKI ,  Kiyoshi KATO ,  Tatsuya ONUKI

    IPC分类号： H01L27/108 ,  H01L29/786

    摘要： A novel memory device is provided. The memory device includes a transistor and a capacitor device. The transistor includes a first oxide semiconductor; a first conductor and a second conductor provided over a top surface of the first oxide semiconductor; a second oxide semiconductor that is formed over the first oxide semiconductor and is provided between the first conductor and the second conductor; a first insulator provided in contact with the second oxide semiconductor; and a third conductor provided in contact with the first insulator. The capacitor device includes the second conductor; a second insulator over the second conductor; and a fourth conductor over the second insulator. The first oxide semiconductor has a groove deeper than a thickness of each of the first conductor and the second conductor.

    SEMICONDUCTOR DEVICE AND ELECTRONIC DEVICE INCLUDING THE SEMICONDUCTOR DEVICE
    9.
    发明申请
    SEMICONDUCTOR DEVICE AND ELECTRONIC DEVICE INCLUDING THE SEMICONDUCTOR DEVICE 有权

    公开(公告)号：US20220085073A1

    公开(公告)日：2022-03-17

    申请号：US17422312

    申请日：2019-11-19

    申请人： Semiconductor Energy Laboratory Co., Ltd.

    发明人： Tatsuya ONUKI ,  Yuto YAKUBO ,  Yuki OKAMOTO ,  Seiya SAITO ,  Kiyoshi KATO ,  Shunpei YAMAZAKI

    IPC分类号： H01L27/12 ,  G11C11/4091 ,  G11C11/4096

    摘要： A semiconductor device having a novel structure is provided. The semiconductor device includes a first element layer including a first memory cell, a second element layer including a second memory cell, and a silicon substrate including a driver circuit. The first element layer is provided between the silicon substrate and the second element layer. The first memory cell includes a first transistor and a first capacitor. The second memory cell includes a second transistor and a second capacitor. One of a source and a drain of the first transistor and one of a source and a drain of the second transistor are each electrically connected to a wiring for electrical connection to the driver circuit. The wiring is in contact with a first semiconductor layer included in the first transistor and a second semiconductor layer included in the second transistor and is provided in a direction perpendicular or substantially perpendicular to a surface of the silicon substrate.

    MEMORY DEVICE
    10.
    发明申请
    MEMORY DEVICE 有权

    公开(公告)号：US20220085020A1

    公开(公告)日：2022-03-17

    申请号：US17424621

    申请日：2019-11-18

    申请人： Semiconductor Energy Laboratory Co., Ltd.

    发明人： Shuhei NAGATSUKA ,  Tatsuya ONUKI ,  Kiyoshi KATO ,  Shunpei YAMAZAKI

    IPC分类号： H01L27/108 ,  H01L27/12 ,  H01L29/24 ,  H01L29/786

    摘要： A novel memory device is provided. Over a driver circuit layer, N memory layers (N is a natural number greater than or equal to 2) including a plurality of memory cells provided in a matrix are stacked. The memory cell includes two transistors and one capacitor. An oxide semiconductor is used as a semiconductor included in the transistor. The memory cell is electrically connected to a write word line, a selection line, a capacitor line, a write bit line, and a read bit line. The write bit line and the read bit line extend in the stacking direction, whereby the signal propagation distance from the memory cell to the driver circuit layer is shortened.