公开(公告)号：US20240364343A1

公开(公告)日：2024-10-31

申请号：US18766726

申请日：2024-07-09

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Hiroki INOUE ,  Munehiro KOZUMA ,  Takeshi AOKI ,  Shuji FUKAI ,  Fumika AKASAWA ,  Shintaro HARADA ,  Sho NAGAO

IPC: H03K19/094 ,  H01L27/06

CPC classification number: H03K19/094 ,  H01L27/0629

Abstract: A semiconductor device using unipolar transistors, in which high and low levels are expressed using high and low power supply potentials, is provided. The semiconductor device includes four transistors, two capacitors, two wirings, two input terminals, and an output terminal. A source or a drain of the first transistor and a source or a drain of the fourth transistor are electrically connected to the first wiring. A gate of the fourth transistor is electrically connected to the first input terminal, and a gate of the second transistor is electrically connected to the second input terminal. A source or a drain of the second transistor and a source or a drain of the third transistor are electrically connected to the second wiring. The first transistor, the second transistor, and the two capacitors are electrically connected to the output terminal.

公开(公告)号：US20230326955A1

公开(公告)日：2023-10-12

申请号：US18022304

申请日：2021-08-12

Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.

Inventor： Shunpei YAMAZAKI ,  Sachiaki TEZUKA ,  Haruyuki BABA ,  Yuji EGI ,  Yasuhiro JINBO ,  Yujiro SAKURADA ,  Takeshi AOKI

IPC: H01L21/20 ,  H01L21/3115

CPC classification number: H01L28/60 ,  H01L21/3115

Abstract: A semiconductor device with a small variation in characteristics is provided. In a manufacturing method of a semiconductor device including a capacitor with reduced leak current, a first conductor is formed; a second insulator is formed over the first conductor; a third insulator is formed over the second insulator; a second conductor is formed over the third insulator; a fourth insulator is deposited over the second conductor and the third insulator; by heat treatment, hydrogen contained in the third insulator diffuses into or is absorbed by the second insulator; the first conductor is one electrode of the capacitor; the second conductor is the other electrode of the capacitor; and each of the second insulator and the third insulator is a dielectric of the capacitor.

公开(公告)号：US20200004357A1

公开(公告)日：2020-01-02

申请号：US16489716

申请日：2018-02-26

Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.

Inventor： Shintaro HARADA ,  Yoshiyuki KUROKAWA ,  Takeshi AOKI ,  Yuki OKAMOTO ,  Hiroki INOUE ,  Koji KUSUNOKI ,  Yosuke TSUKAMOTO ,  Katsuki YANAGAWA ,  Kei TAKAHASHI ,  Shunpei YAMAZAKI

IPC: G06F3/041 ,  G06K9/00 ,  G09G5/22 ,  G06F1/16 ,  G06N3/04 ,  G06N3/08

Abstract: An electronic device capable of efficiently recognizing a handwritten character is provided.The electronic device includes a first circuit, a display portion, and a touch sensor. The first circuit includes a neural network. The display portion includes a flexible display. The touch sensor has the function of outputting an input handwritten character as image information to the first circuit. The first circuit has the function of analyzing the image information and converting the image information into character information, and a function of displaying an image including the character information on the display portion. The analysis is performed by inference through the use of the neural network.

公开(公告)号：US20170053699A1

公开(公告)日：2017-02-23

申请号：US15232106

申请日：2016-08-09

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Takeshi AOKI ,  Munehiro KOZUMA ,  Yoshiyuki KUROKAWA

IPC: G11C14/00 ,  H03K19/177 ,  H01L27/06 ,  H01L27/12

CPC classification number: G11C14/0054 ,  G11C11/24 ,  G11C14/00 ,  H01L27/0688 ,  H01L27/1225 ,  H03K3/356008 ,  H03K19/1776 ,  H03K19/17764

Abstract: A semiconductor device that has a long data retention time during stop of supply of power supply voltage by reducing leakage current due to miniaturization of a semiconductor element. In a structure where charge corresponding to data is held with the use of low off-state current of a transistor containing an oxide semiconductor in its channel formation region, a transistor for reading data and a transistor for storing charge are separately provided, thereby decreasing leakage current flowing through a gate insulating film.

Abstract translation: 一种半导体器件，其通过减少由于半导体元件的小型化引起的漏电流而在停止供给电源电压期间具有长的数据保持时间。 在使用在其沟道形成区域中含有氧化物半导体的晶体管的低截止电流来保持对应于数据的电荷的结构中，分别提供用于读取数据的晶体管和用于存储电荷的晶体管，从而减少泄漏 电流流过栅极绝缘膜。

公开(公告)号：US20160380630A1

公开(公告)日：2016-12-29

申请号：US15191763

申请日：2016-06-24

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Munehiro KOZUMA ,  Yoshiyuki KUROKAWA ,  Takayuki IKEDA ,  Takeshi AOKI

IPC: H03K19/00 ,  H03K19/173 ,  H03K19/177 ,  H01L27/12 ,  H01L29/786

CPC classification number: H03K19/0013 ,  H01L27/1225 ,  H01L27/124 ,  H01L29/24 ,  H01L29/7869 ,  H03K19/09441 ,  H03K19/1737 ,  H03K19/17728 ,  H03K19/17748 ,  H03K19/1776

Abstract: A programmable logic device includes a plurality of programmable logic elements (PLE) whose electrical connection is controlled by first configuration data. Each of The PLEs includes an LUT in which a relationship between a logic level of an input signal and a logic level of an output signal is determined by second configuration data, an FF to which the output signal of the LUT is input, and an MUX. The MUX includes at least two switches each including first and second transistor. A signal including third configuration data is input to a gate of the second transistor through the first transistor. The output signal of the LUT or an output signal of the FF is input to one of a source and a drain of the second transistor.

公开(公告)号：US20150256177A1

公开(公告)日：2015-09-10

申请号：US14635087

申请日：2015-03-02

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Munehiro KOZUMA ,  Takayuki IKEDA ,  Yoshiyuki KUROKAWA ,  Takeshi AOKI ,  Takashi NAKAGAWA

IPC: H03K19/00 ,  G06F1/16 ,  H03K19/177 ,  H01L29/786 ,  H01L27/12

CPC classification number: H03K19/0008 ,  G06F1/16 ,  H01L27/1207 ,  H01L29/42384 ,  H01L29/78648 ,  H01L29/7869 ,  H01L29/78696 ,  H03K19/1776

Abstract: A semiconductor device in which operation delay due to stop and restart of the supply of a power supply potential is suppressed is provided. Potentials corresponding to data held in first and second nodes while the supply of a power supply potential is continued are backed up in third and fourth nodes while the supply of the power supply potential is stopped. After the supply of the power supply potential is restarted, data are restored to the first and second nodes by utilizing a change in channel resistance of a transistor whose gate is electrically connected to the third or fourth node. Note that shoot-through current is suppressed at the time of data restoration by electrically disconnecting the power supply potential and the first or second node from each other.

Abstract translation: 提供了一种半导体装置，其中抑制了由于电源电位供应的停止和重启而导致的操作延迟。 在电源电位的供给停止的同时，在供给电源电位的同时保持在第一节点和第二节点上的数据对应的电位被备份在第三节点和第四节点中。 在重新开始供电电位之后，通过利用栅极电连接到第三或第四节点的晶体管的沟道电阻的变化，将数据恢复到第一和第二节点。 注意，通过将电源电位和第一或第二节点彼此电断开来，在数据恢复时抑制直通电流。

公开(公告)号：US20240006424A1

公开(公告)日：2024-01-04

申请号：US18232424

申请日：2023-08-10

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Takeshi AOKI ,  Yoshiyuki KUROKAWA ,  Takayuki IKEDA ,  Hikaru TAMURA

IPC: H01L27/146 ,  G09G3/36 ,  H01L29/786

CPC classification number: H01L27/14603 ,  G09G3/3648 ,  H01L27/14641 ,  H01L27/14612 ,  H01L27/14616 ,  H01L27/14625 ,  H01L27/14636 ,  H01L27/14643 ,  H01L29/7869 ,  G09G2354/00

Abstract: An object is to provide a pixel structure of a display device including a photosensor which prevents changes in an output of the photosensor and a decrease in imaging quality. The display device has a pixel layout structure in which a shielding wire is disposed between an FD and an imaging signal line (a PR line, a TX line, or an SE line) or between the FD and an image-display signal line in order to reduce or eliminate parasitic capacitance between the FD and a signal line for the purpose of suppressing changes in the potential of the FD. An imaging power supply line, image-display power supply line, a GND line, a common line, or the like whose potential is fixed, such as a common potential line, is used as a shielding wire.

公开(公告)号：US20230352477A1

公开(公告)日：2023-11-02

申请号：US18016880

申请日：2021-07-26

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Takanori MATSUZAKI ,  Tatsuya ONUKI ,  Munehiro KOZUMA ,  Takeshi AOKI ,  Yuki OKAMOTO ,  Takayuki IKEDA

IPC: H01L27/06 ,  H01L29/786 ,  G06F7/544 ,  H01L27/092 ,  G06N3/065

CPC classification number: H01L27/0688 ,  H01L29/7869 ,  G06F7/5443 ,  H01L29/78618 ,  H01L29/78696 ,  H01L27/0924 ,  G06N3/065

Abstract: A semiconductor device with a novel structure is provided. The semiconductor device includes a digital calculator, an analog calculator, a first memory circuit, and a second memory circuit. The analog calculator, the first memory circuit, and the second memory circuit each include a transistor including an oxide semiconductor in a channel formation region. The first memory circuit has a function of supplying first weight data to the digital calculator as digital data. The digital calculator has a function of performing product-sum operation using the first weight data. The second memory circuit has a function of supplying second weight data to the analog calculator as analog data. The analog calculator has a function of performing product-sum operation using the second weight data. The amount of current flowing between a source and a drain of at least one of the transistors each including the oxide semiconductor in the channel formation region in the analog calculator and the second memory circuit is the amount of current flowing when the transistor operates in a subthreshold region.

公开(公告)号：US20230049977A1

公开(公告)日：2023-02-16

申请号：US17785510

申请日：2020-12-14

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Yoshiyuki KUROKAWA ,  Munehiro KOZUMA ,  Takeshi AOKI ,  Takuro KANEMURA

IPC: G06N3/063 ,  G11C11/405 ,  H01L27/108 ,  H01L27/12 ,  H01L29/786 ,  G06F7/544

Abstract: A semiconductor device that has low power consumption and is capable of performing arithmetic operation is provided. The semiconductor device includes first to third circuits and first and second cells. The first cell includes a first transistor, and the second cell includes a second transistor. The first and second transistors operate in a subthreshold region. The first cell is electrically connected to the first circuit, the first cell is electrically connected to the second and third circuits, and the second cell is electrically connected to the second and third circuits. The first cell sets current flowing from the first circuit to the first transistor to a first current, and the second cell sets current flowing from the second circuit to the second transistor to a second current. At this time, a potential corresponding to the second current is input to the first cell. Then, a sensor included in the third circuit supplies a third current to change a potential of the second wiring, whereby the first cell outputs a fourth current corresponding to the first current and the amount of change in the potential.

公开(公告)号：US20220102340A1

公开(公告)日：2022-03-31

申请号：US17425348

申请日：2020-02-13

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Kei TAKAHASHI ,  Takeshi AOKI

IPC: H01L27/06 ,  H01L29/786 ,  H03F3/16

Abstract: A novel comparison circuit, a novel amplifier circuit, a novel battery control circuit, a novel battery protection circuit, a power storage device, a semiconductor device, an electronic device, and the like are provided. The semiconductor device includes a capacitor, a first amplifier circuit including a first output terminal electrically connected to a first electrode of the capacitor, and a second amplifier circuit including an input terminal, a second output terminal, a first transistor, and a second transistor; a second electrode of the capacitor is electrically connected to the input terminal; the input terminal is electrically connected to a gate of the first transistor and one of a source and a drain of the second transistor; one of a source and a drain of the first transistor is electrically connected to the second output terminal; the second transistor has a function of supplying a potential to the input terminal and holding the potential; and a channel formation region of the second transistor includes a metal oxide containing at least one of indium and gallium.