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11.
公开(公告)号:US20210184710A1
公开(公告)日:2021-06-17
申请号:US17108888
申请日:2020-12-01
IPC分类号: H04B1/04 , H03F1/02 , H03F3/19 , H03F3/24 , H03G3/30 , H04L7/00 , H04L7/04 , H03F3/00 , H03G3/00
摘要: A power amplifier module can include one or more switches, a coupler module, input signal pins, and a controller having first and second output terminals. The input signal pins can receive a voltage input/output signal, a clock input signal, and a data input signal. The controller can (i) set a mode of the one or more switches using a synchronous communication protocol in which the controller outputs a synchronous clock signal on the first output terminal and a data signal on the second output terminal, when the power amplifier module is in a first operating mode, or (ii) set a mode of the coupler module using an asynchronous communication protocol in which the controller outputs a first asynchronous control signal on the first output terminal and a second asynchronous control signal on the second output terminal, when the power amplifier module is in a second operating mode.
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公开(公告)号:US20210117354A1
公开(公告)日:2021-04-22
申请号:US17077696
申请日:2020-10-22
IPC分类号: G06F13/362 , G06F1/28 , G06F13/42
摘要: Systems and methods for load detection on serial communication data lines are provided herein. In certain configurations, a serial communication system includes a data line having a load capacitance and a master device configured to generate a command signal for a slave device to measure the load capacitance on the data line. The system further includes a slave device including a load detector including a controller configured to receive the command signal from the master device, provide a first fixed current to the data line, determine an amount of time elapsed while the data line is driven to a first threshold value, and determine the load capacitance of the data line based on the amount of time elapsed.
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公开(公告)号:US10700645B2
公开(公告)日:2020-06-30
申请号:US16029566
申请日:2018-07-07
摘要: Power amplification system with adaptive bias control. In some embodiments a power amplification system includes a power amplifier including a radio-frequency (RF) input terminal for receiving an RF signal, an RF output terminal for providing an amplified RF signal, a supply voltage terminal for receiving a power amplifier supply voltage to power the power amplifier, and one or more bias terminals for receiving one or more bias signals. The power amplification system also includes a bias controller configured to provide the one or more bias signals to the one or more bias terminals, at least one of the one or more bias signals being based on the power amplifier supply voltage.
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14.
公开(公告)号:US10218393B2
公开(公告)日:2019-02-26
申请号:US15634841
申请日:2017-06-27
IPC分类号: H03F3/24 , H04B1/04 , H04L7/00 , H04L7/04 , H03F1/02 , H03F3/19 , H03G3/30 , H03F3/00 , H03G3/00
摘要: A power amplifier module can include one or more switches, a coupler module, input signal pins, and a controller having first and second output terminals. The input signal pins can receive a voltage input/output signal, a clock input signal, and a data input signal. The controller can (i) set a mode of the one or more switches using a synchronous communication protocol in which the controller outputs a synchronous clock signal on the first output terminal and a data signal on the second output terminal, when the power amplifier module is in a first operating mode, or (ii) set a mode of the coupler module using an asynchronous communication protocol in which the controller outputs a first asynchronous control signal on the first output terminal and a second asynchronous control signal on the second output terminal, when the power amplifier module is in a second operating mode.
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15.
公开(公告)号:US20180019772A1
公开(公告)日:2018-01-18
申请号:US15634841
申请日:2017-06-27
CPC分类号: H04B1/0475 , H03F1/0222 , H03F3/00 , H03F3/19 , H03F3/24 , H03F3/245 , H03F2200/102 , H03F2200/111 , H03F2200/451 , H03G3/00 , H03G3/3042 , H04B1/0458 , H04B1/0483 , H04B2001/0408 , H04B2001/0433 , H04L7/0091 , H04L7/04
摘要: A power amplifier module can include one or more switches, a coupler module, input signal pins, and a controller having first and second output terminals. The input signal pins can receive a voltage input/output signal, a clock input signal, and a data input signal. The controller can (i) set a mode of the one or more switches using a synchronous communication protocol in which the controller outputs a synchronous clock signal on the first output terminal and a data signal on the second output terminal, when the power amplifier module is in a first operating mode, or (ii) set a mode of the coupler module using an asynchronous communication protocol in which the controller outputs a first asynchronous control signal on the first output terminal and a second asynchronous control signal on the second output terminal, when the power amplifier module is in a second operating mode.
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公开(公告)号:US09634619B2
公开(公告)日:2017-04-25
申请号:US14531967
申请日:2014-11-03
CPC分类号: H03F1/0205 , H01L23/66 , H01L2223/6611 , H01L2223/665 , H01L2223/6655 , H01L2224/05554 , H01L2224/48227 , H01L2224/49171 , H03F1/0261 , H03F1/32 , H03F1/56 , H03F3/19 , H03F3/195 , H03F3/245 , H03F2200/18 , H03F2200/222 , H03F2200/387 , H03F2200/451 , H03F2200/555 , H04B1/40
摘要: Improved power amplifier (PA) bias circuit having parallel emitter follower. In some embodiments, a bias circuit for a PA can include a first bias path implemented to couple a base node of an amplifying transistor and a supply node, with the first bias path being configured to provide a base bias current to the base node. The PA can further include a second bias path implemented to be electrically parallel with the first bias path between the base node and the supply node. The second bias path can be configured to provide an additional base bias current to the base node under a selected condition.
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17.
公开(公告)号:US10886955B2
公开(公告)日:2021-01-05
申请号:US16246344
申请日:2019-01-11
IPC分类号: H04B1/04 , H03F1/02 , H03F3/19 , H03F3/24 , H03G3/30 , H04L7/00 , H04L7/04 , H03F3/00 , H03G3/00
摘要: A power amplifier module can include one or more switches, a coupler module, input signal pins, and a controller having first and second output terminals. The input signal pins can receive a voltage input/output signal, a clock input signal, and a data input signal. The controller can (i) set a mode of the one or more switches using a synchronous communication protocol in which the controller outputs a synchronous clock signal on the first output terminal and a data signal on the second output terminal, when the power amplifier module is in a first operating mode, or (ii) set a mode of the coupler module using an asynchronous communication protocol in which the controller outputs a first asynchronous control signal on the first output terminal and a second asynchronous control signal on the second output terminal, when the power amplifier module is in a second operating mode.
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公开(公告)号:US10284235B2
公开(公告)日:2019-05-07
申请号:US15214727
申请日:2016-07-20
发明人: Philip H. Thompson , Steven T. Seiz , Roman Zbigniew Arkiszewski , Matthew Lee Banowetz , Duane A. Green
摘要: Disclosed herein are wireless transceivers with switches to reduce harmonic leakage. In some embodiments, a transmitter system includes a power amplification system including a first power amplifier configured to amplify a signal at a first cellular frequency band and a second power amplifier configured to amplify a signal at a second cellular frequency band. The transmitter includes a switch coupled between an output of the second power amplifier and a ground potential. The transmitter includes a controller configured to, based on a band select signal, control the switch and selectively enable or disable each of the first power amplifier and the second power amplifier. Selective control of the switch can reduce harmonic leakage compared to a system that does not include the disclosed switches and controls.
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公开(公告)号:US10033336B2
公开(公告)日:2018-07-24
申请号:US15285839
申请日:2016-10-05
摘要: Power amplification system with adaptive bias control. In some embodiments a power amplification system includes a power amplifier including a radio-frequency (RF) input terminal for receiving an RF signal, an RF output terminal for providing an amplified RF signal, a supply voltage terminal for receiving a power amplifier supply voltage to power the power amplifier, and one or more bias terminals for receiving one or more bias signals. The power amplification system also includes a bias controller configured to provide the one or more bias signals to the one or more bias terminals, at least one of the one or more bias signals being based on the power amplifier supply voltage.
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公开(公告)号:US09935588B2
公开(公告)日:2018-04-03
申请号:US15296007
申请日:2016-10-17
发明人: Jianxing Ni , Michael Lynn Gerard , Ramanan Bairavasubramanian , Dwayne Allen Rowland , Matthew Lee Banowetz
CPC分类号: H03F1/32 , H03F3/19 , H03F3/191 , H03F3/195 , H03F3/211 , H03F3/245 , H03F2200/18 , H03F2200/451 , H03F2201/3215 , H03F2203/21127 , H03F2203/21145
摘要: Circuits, devices and methods related to multi-mode power amplifiers. A power amplifier (PA) assembly can include a radio-frequency (RF) amplification path having a first stage and a second stage, with each stage including a transistor. The PA assembly can further include a biasing circuit having a first bias path between a supply node and the base of a corresponding transistor. The PA assembly can further include a linearizing circuit implemented as either or both of a second bias path and a coupling path relative to the first bias path. The second bias path can be configured to provide an additional base bias current to the base under a selected condition. The coupling path can be configured to improve linearity of the corresponding transistor operating in a first mode while allowing a ballast resistance to be sufficiently robust for the corresponding transistor operating in a second mode.
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